cx28500 Mindspeed Technologies, cx28500 Datasheet - Page 27
cx28500
Manufacturer Part Number
cx28500
Description
Cx28500 Multichannel Synchronous Communications Controller
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28500.pdf
(224 pages)
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Figure 1-5.
28500-DSH-002-C
EBUS bus configuration to local devices
PCI bus which acts as CX28500’s configuration/status interface
Power solutions for HDLC processing messages (two HDLC controllers running at 66 MHz)
IPC channel processor
Performance monitoring
Scalable configuration up to OC-48
T3/E3 data link over the TSBUS channel
Gigabit Router Line Card for OC-12
SONET
SDH
NOTE:
This configuration allows the Power PC (PPC) to receive and transmit data link messages
over these channels via its local RAM (using DMA and buffer table) instead of having to
service individual channel FIFOs with direct read/write access on each device. This
effectively removes all PPC real-time constrains, the only remaining real-time activity is to
handle the single line interrupt from the Mapper to the PPC.
LEGEND:
EBUS = Expansion Bus
TSBUS = 84 Time Slot Bus (x3)
SIBUS = SONET Interleaved Bus
PCI = 66 MHz, 64-bit Data Bus
ROM = Read Only Memory
PPC = Power PC
BAM = Broadband Access Multiplexer (e.g. 29503)
Mapper = SONET/SDH Mapper/Framer (e.g. 29610)
Optics
Mindspeed Proprietary and Confidential
Mindspeed Technologies
CX29610
Mapper
EBUS
SIBUS
SIBUS
SIBUS
SIBUS
CX29503
CX29503
CX29503
CX29503
BAM
BAM
BAM
BAM
TSBUS
TSBUS
TSBUS
TSBUS
®
CX28500
CX28500
HDLC
HDLC
ROM
PPC
PCI
RAM
RAM
Introduction
500052_007
12
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