lxt972a Intel Corporation, lxt972a Datasheet - Page 63

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lxt972a

Manufacturer Part Number
lxt972a
Description
3.3v Dual-speed Fast Ethernet Transceiver Datasheet
Manufacturer
Intel Corporation
Datasheet

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Datasheet
6.15:6
6.5
6.4
6.3
6.2
6.1
6.0
7.15
7.14
7.13
7.12
7.11
7.10:0
1. RO = Read Only LH = Latching High
1. RO = Read Only. R/W = Read/Write
Bit
Bit
Table 43. Auto Negotiation Expansion (Address 6)
Table 44. Auto Negotiation Next Page Transmit Register (Address 7)
Next Page
(NP)
Reserved
Message Page
(MP)
Acknowledge 2
(ACK2)
Toggle
(T)
Message/
Unformatted Code
Field
Reserved
Base Page
Parallel
Detection Fault
Link Partner
Next Page Able
Next Page Able
Page Received
Link Partner A/
N Able
Name
Name
Ignore on read.
This bit indicates the status of the Auto-Negotiation variable, base page. It
flags synchronization with the Auto-Negotiation state diagram allowing
detection of interrupted links. This bit is only used if bit 16.1 (Alternate NP
feature) is set.
1 = basepage = true
0 = basepage = false
1 = Parallel detection fault has occurred.
0 = Parallel detection fault has not occurred.
1 = Link partner is next page able.
0 = Link partner is not next page able.
1 = Local device is next page able.
0 = Local device is not next page able.
1 = Indicates that a new page has been received and the received code
word has been loaded into register 5 (base pages) or register 8 (next
pages) as specified in clause 28 of 802.3. This bit is cleared on read. If bit
16.1 is set, the Page Received bit is also cleared when mr_page_rx = false
or transmit_disable = true.
1 = Link partner is auto-negotiation able.
0 = Link partner is not auto-negotiation able.
1 = Additional next pages follow
0 = Last page
Write as 0, ignore on read
1 = Message page
0 = Unformatted page
1 = Complies with message
0 = Can not comply with message
1 = Previous value of the transmitted Link Code Word equalled logic
zero
0 = Previous value of the transmitted Link Code Word equalled logic
one
3.3V Dual-Speed Fast Ethernet Transceiver Datasheet — LXT972A
Description
Description
Type
Type
RO/
RO/
RO
RO
RO
RO
RO
LH
LH
LH
R/W
R/W
R/W
R/W
R/W
RO
1
1
00000000
Default
Default
001
0
0
0
0
1
0
0
0
0
1
0
0
63

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