lc75817e Sanyo Semiconductor Corporation, lc75817e Datasheet
lc75817e
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lc75817e Summary of contents
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... Ordering number : EN6144 1/8 to 1/10 Duty Dot Matrix LCD Display Controller/Driver Overview The LC75817E and LC75817W are 1/8 to 1/10 duty dot matrix LCD display controller/drivers that supports the display of characters, numbers, and symbols. In addition to generating dot matrix LCD drive signals based on data transferred serially from a microcontroller, the LC75817E and LC75817W also provide on-chip character display ROM and RAM to allow display systems to be implemented easily ...
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... Package Dimensions unit: mm 3151-QFP100E [LC75817E] 23.2 20.0 1.6 0.575 0.65 0.3 0.575 100 1 30 21.6 LC75817E, 75817W unit: mm 3181B-SQFP100 1.0 0. 100 0.1 2.7 0.8 SANYO: QFP100E [LC75817W] 16.0 14.0 0.5 1.0 0.145 0.1 0.2 1.4 0.5 0.5 SANYO: SQFP100 No. 6144-2/43 ...
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... Pin Assignments (Top View) LC75817E, 75817W LC75817E QFP100E LC75817W SQFP100 No. 6144-3/43 ...
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... High level clock pulse width tøH Low level clock pulse width tøL DO output delay time rise time t dr Note: *1. Since the DO pin is an open-drain output, these times depend on the values of the pull-up resistor R LC75817E, 75817W = Symbol Conditions V max max ...
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... Current drain LCD When the display contrast adjustment circuit is used LCD When the display contrast adjustment circuit is not used. Note: *2. Excluding the bias voltage generation divider resistor built into the V LC75817E, 75817W Conditions = –20 µ – ...
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... When CL is stopped at the low level • When CL is stopped at the high level Block Diagram LC75817E, 75817W Figure 2 No. 6144-6/43 ...
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... LCD circuit is used and provide a voltage of between 4.5 and 10.0 V when the circuit is not used Power supply connection. Connect to ground. SS LC75817E, 75817W Function ): SS • Display off S1 to S59 = “L” (V 4). LCD S60/COM10 = “L” (V 4). LCD COM1 to COM9 = “L” ...
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... Example: When the DCRAM address is 2E DA0 DA1 DA2 DA3 DA4 Note: * dots ... 12-digit display 5 7 dots 5 8 dots ... 12-digit display 5 8 dots 5 9 dots ... 12-digit display 4 9 dots LC75817E, 75817W . ...
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... DCRAM address loaded into AC. • CGRAM (Character generator RAM) CGRAM is RAM to which user programs can freely write arbitrary character patterns kinds dot matrix character patterns can be stored. CGRAM has a capacity bits. LC75817E, 75817W . (Number of digit displayed: 12 ...
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... LC75817E, 75817W Instruction data ( bits) Instruction data ( bits) ...
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... LC75817E, 75817W No. 6144-11/43 ...
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... Display digit 1 2 Display digit data DG1 DG2 For example, if DG1 to DG6 are 1, and DG7 to DG12 are 0, then display digits will be turned on, and display digits will be turned off (blanked). LC75817E, 75817W Output pins COM9 S60/COM10 4 level S60 LCD COM9 ...
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... MSB Least significant bit Most significant bit This instruction loads the 6-bit DCRAM address DA0 to DA5 and the 4-bit ADRAM address RA0 to RA3 into the AC. LC75817E, 75817W 4 level, regardless of the M, A, and DG1 to DG12 data. LCD Mode 4 level and the oscillator on the OSCI, OSCO pins is stopped (although it operates during key ...
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... DCRAM data write method when (Instructions other than the “DCRAM data write” instruction cannot be executed.) CCB address CCB address (1) 24 bits Instruction execution time DCRAM data write finishes LC75817E, 75817W Code X DA4 DA5 MSB Most significant bit AC4 AC5 AC6 ...
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... ADATA. This display function does not use CGROM or CGRAM. The figure below shows the correspondence between the data and the display. When ADn = 1 (where integer between 1 and 5) the segment corresponding to that data will be turned on integer between 0 and 11) LC75817E, 75817W Code ...
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... X: don’t care Data format at (6) (16 bits) Code D48 D49 D50 D51 D52 D53 D54 D55 D56 D57 D58 D59 D60 D61 D62 D63 AD1 AD2 AD3 AD4 AD5 LC75817E, 75817W ADRAM data write method CCB address (4) (4) 24 bits 24 bits Instruction ...
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... CD25 CD26 CD27 CD28 CD29 CD30 CD31 CD32 CD33 CD34 CD35 CD36 CD37 CD38 CD39 CD40 CD41 CD42 CD43 CD44 CD45 LC75817E, 75817W Code D10 CD6 CD7 CD8 CD9 CD10 CD11 Code D21 D22 D23 D24 D25 D26 CD22 ...
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... Note that although the display contrast can be adjusted by operating the built-in display contrast adjustment circuit also possible to apply fine adjustments to the contrast by connecting an external variable resistor to the V the V 4 pin voltage. However, the following conditions must be met: (V LCD LC75817E, 75817W Code D54 D55 D56 ...
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... General-purpose output port state setting data For example, if PC1 and PC2 are set to 1 and PC3 and PC4 are set to 0, then output pins P1 and P2 will output high levels (V ) and P3 and P4 will output low levels (V DD LC75817E, 75817W Code D54 D55 D56 ...
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... CCB address 43H • KD1 to KD30 : Key data • Sleep acknowledge data • Note: *17 key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data(SA) will be invalid. LC75817E, 75817W No. 6144-20/43 ...
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... This output data bit is set to the state when the key was pressed. Also, while DO will be low in this case, if serial data is input and the mode is set (to normal or sleep mode) during this period, that mode will be set. SA will sleep mode and 0 in normal mode. LC75817E, 75817W KI3 KI4 ...
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... DO) to the controller. The controller acknowledges this request and reads the key data. However high during a serial data transfer, DO will be set high. After the controller reads the key data, the key data read request is cleared (DO is set high) and the LC75817E/W • ...
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... DO) to the controller. The controller acknowledges this request and reads the key data. However high during a serial data transfer, DO will be set high. After the controller reads the key data, the key data read request is cleared (DO is set high) and the LC75817E/W • ...
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... LCD segments corresponding to COM1 are turned on LCD driver output when only LCD segments corresponding to COM2 are turned on LCD driver output when all LCD segments corresponding to COM1 to COM8 are turned on LC75817E, 75817W VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 ...
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... LCD segments corresponding to COM1 are turned on LCD driver output when only LCD segments corresponding to COM2 are turned on LCD driver output when all LCD segments corresponding to COM1 to COM9 are turned on LC75817E, 75817W VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 ...
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... LCD segments corresponding to COM1 are turned on LCD driver output when only LCD segments corresponding to COM2 are turned on LCD driver output when all LCD segments corresponding to COM1 to COM10 are turned on LC75817E, 75817W VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 VLCD0 VLCD4 ...
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... System Reset 1. Reset function The LC75817E/W performs a system reset with the VDET. When a system reset is applied, the display is turned off, key scanning is disabled, the key data is reset, and the general-purpose ports are set to and held at the low level (V states that are created as a result of the system reset can be cleared by executing the instruction described below. (See figure 3.) • ...
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... Disabled Key scan General-purpose Fixed at the low level (V output ports Display state “Set key scan output state” instruction execution LC75817E, 75817W Initial state settings Execution enabled ) Can be set to either the high (V SS Display off “Set general-purpose “Display on/off control” ...
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... After that, key scanning can be performed by executing a “set key scan output state” instruction. (10) GENERAL PORT The general-purpose output ports are fixed at the low level (V (11) CCB INTERFACE, SHIFT REGISTER These circuits go to the serial data input wait state. LC75817E, 75817W ) when a reset is applied. SS No. 6144-29/43 ...
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... Since this output pin is an open-drain output, a pull-up resistor (between 1 k and required. This pin is held at the high level even if a key data read operation is performed before executing a “set key scan output state” instruction. LC75817E, 75817W SEGMENT DRIVER ...
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... Notes: *22. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V logic block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75817E/W is reset by the VDET. DD *23 variable resistor is not used for display contrast fine adjustment, the V *24 ...
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... Notes: *22. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V logic block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75817E/W is reset by the VDET. DD *23 variable resistor is not used for display contrast fine adjustment, the V *24 ...
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... Notes: *22. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V logic block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75817E/W is reset by the VDET. DD *23 variable resistor is not used for display contrast fine adjustment, the V *24 ...
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... Notes: *22. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V logic block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75817E/W is reset by the VDET. DD *23 variable resistor is not used for display contrast fine adjustment, the V *24 ...
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... Notes: *22. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V logic block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75817E/W is reset by the VDET. DD *23 variable resistor is not used for display contrast fine adjustment, the V *24 ...
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... Notes: *22. Add a capacitor to the logic block power supply line so that the logic block power supply voltage V logic block power supply voltage V fall time when power drops are both at least 1 ms, as the LC75817E/W is reset by the VDET. DD *23 variable resistor is not used for display contrast fine adjustment, the V *24 ...
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... DCRAM data write (increment mode DCRAM data write (increment mode LC75817E, 75817W MSB Display Initializes the IC. The display is in the off state. Sets to 1/8 duty 1/4 bias display drive technique 8 Writes the display data “ ” to DCRAM address 00H A Writes the display data “S” to DCRAM address 01H 5 Writes the display data “ ...
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... Set AC address Note: *26. This example above assumes the use of 12 digits 5 LC75817E, 75817W MSB Display Loads the DCRAM address 00H and the ADRAM 2 address 0H into Turns on the LCD for all digits (12 digits) in MDATA 4 ...
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... The period t9 in this technique must satisfy the following condition. t9>t6+t7+ key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data (SA) will be invalid. LC75817E, 75817W Key ...
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... Key scan execution time when the key data agreed for two key scans. (4800T(s)) t6: Key scan execution time when the key data did not agree for two key scans and the key scan was executed again. (9600T(s)) t7: Key address (43H) transfer time t8: Key data read time LC75817E, 75817W NO Key on t5 ...
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... DO state when CE is low and reading the key data. The period t10 in this technique must satisfy the following condition. t10 > key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data (SA) will be invalid. LC75817E, 75817W No. 6144-41/43 ...
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... LC75817E, 75817W No. 6144-42/43 ...
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Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as ...