cxd3152ar Sony Electronics, cxd3152ar Datasheet - Page 28
cxd3152ar
Manufacturer Part Number
cxd3152ar
Description
Signal Processor Lsi For Single-chip Ccd B/w Camera
Manufacturer
Sony Electronics
Datasheet
1.CXD3152AR.pdf
(45 pages)
- Current page: 28 of 45
- Download datasheet (307Kb)
Description of Registers
Address
00 (h)
0F (h)
10 (h)
14 (h)
REGRES
WSTART
RSTART
YGAM1
Symbol
REGRES
dummy
WSTART
RSTART
YGAM1
dummy
Part symbol
bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Register reset
(The REGRES pin (Pin 40) has precedence.)
Horizontal timing for write start to line memory
Set in MCKI clock units
Horizontal timing for read start from line memory
Set in MCKI clock units
Gamma correction curve adjustment-1
Sets the intersection between the 1st
approximation line (slope = 1) and the 2nd
approximation line (slope = 3).
0x00 : Earliest (advanced) position
0xFE : Latest (delayed) position
0xFF : Internal fixed value
0x00 : Earliest (advanced) position
0xFE : Latest (delayed) position
0xFF : Internal fixed value
Setting range: 00 (h) to 1F (h)
0: Reset, 1: Normal
– 28 –
EIA510 system = 67 (h)
CCIR510 system = 71 (h)
EIA760 system = 95 (h)
CCIR760 system = A3 (h)
EIA510 system = 5C (h)
CCIR510 system = 66 (h)
EIA760 system = 89 (h)
CCIR760 system = 96 (h)
Description
Default
FF (h)
FF (h)
00 (h)
—
CXD3152AR
R/W
W
W
W
W
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