sed1374 ETC-unknow, sed1374 Datasheet - Page 387
sed1374
Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet
1.SED1374.pdf
(420 pages)
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EPSON Research and Development
Vancouver Design Center
3.4 SED1374 Configuration
Interfacing to the Philips MIPS PR31500/PR31700 Processor
Issue Date: 98/11/09
Configuration
SED1374
CNF[2:0]
CNF3
BS#
Pin
= configuration for connection using ITE IT8368E
The SED1374 is configured at power up by latching the state of the CNF[4:0] pins. Pin BS# also
plays a role in host bus interface configuration. For details on configuration, refer to the SED1374
Hardware Functional Specification, document number X26A-A-001-xx.
The table below shows those configuration settings relevant to this specific interface.
When the SED1374 is configured for “Generic #1” interface, the host interface pins are mapped as
in the table below.
Table 3-4: SED1374 Generic #1 Interface Pin Mapping
Table 3-3: SED1374 Configuration Using the IT8368E
Generic #2
Big Endian
1 (IO V
Value hard wired on this pin is used to configure:
DD
)
Pin Name
RD/WR#
WE1#
WE0#
RD#
BS#
111: Generic #1 or #2
connect to V
Pin Function
WE1#
WE0#
RD1#
RD0#
SS
Little Endian
Generic #1
0 (V
SS
)
X26A-G-012-01
SED1374
Page 13
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