k4j55323qi Samsung Semiconductor, Inc., k4j55323qi Datasheet - Page 37

• Manufacturer Part Number: k4j55323qi
• Description: 256mbit Gddr3 Sdram
• Manufacturer: Samsung Semiconductor, Inc.

K4J55323QI
WRITE to READ
COMMAND
ADDRESS
t
t
DQSS
t
DQSS
DQSS
NOTE
WDQS
WDQS
WDQS
RDQS
RDQS
RDQS
/CK
CK
(NOM)
(MAX)
DM
(MIN)
DM
DM
DQ
DQ
DQ
:
1. DI b = data-in for column b.
2. Three subsequent elements of data-in the programmed order following DI b.
3. A burst of 4 is shown.
4. t
5. The READ and WRITE commands are to the same device. However, the READ and WRITE commands may be
6. A8 is LOW with the WRITE command (auto precharge is disabled).
7. WRITE latency is set to 3
WRITE
Bank
Col b
T0
to different devices, in which case t
CDLR
t
t
t
DQSS
DQSS
DQSS
is referenced from the first positive CK edge after the last data-in pair.
NOP
T1
NOP
T2
DI
b
NOP
T3
DI
b
CDLR
DI
b
T3n
is not required and the READ command could be applied earlier.
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NOP
T4
T4n
DON’T CARE
NOP
T5
tCDLR = 5
NOP
T6
256M GDDR3 SDRAM
TRANSITIONING DATA
Bank a.
READ
Col n
T10
Rev. 1.3 May 2007
NOP
CL = 8
T17
CL = 8
CL = 8
NOP
T18
DI
DI
DI
n
n
n
T18n