edd51323dbh-ls Elpida Memory, Inc., edd51323dbh-ls Datasheet - Page 30
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edd51323dbh-ls
Manufacturer Part Number
edd51323dbh-ls
Description
512m Bits Ddr Mobile Ram
Manufacturer
Elpida Memory, Inc.
Datasheet
1.EDD51323DBH-LS.pdf
(59 pages)
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Command Intervals
A Read Command to the Consecutive Read Command Interval
1. Same
2. Same
3. Different
Note: n
Preliminary Data Sheet E1432E11 (Ver. 1.1)
Destination row of the
consecutive read command
Bank
address
Command
Address
4
DQS
/CK
DQ
CK
BA
Row address State
Same
Different
Any
READ to READ Command Interval (same ROW address in the same bank)*
Bank0
Active
ACT
Row
t0
ACTIVE
—
ACTIVE
IDLE
NOP
Column A Column B
READ
tn
Operation
The consecutive read can be performed after an interval of no less than 1 cycle to
interrupt the preceding read operation.
Precharge the bank to interrupt the preceding read operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive read command can be issued. See ‘A read command to the
consecutive precharge interval’ section.
The consecutive read can be performed after an interval of no less than 1 cycle to
interrupt the preceding read operation.
Precharge the bank without interrupting the preceding read operation. tRP after
the precharge command, issue the ACT command. tRCD after the ACT command,
the consecutive read command can be issued.
Column = A
Read
READ
tn+1
Column = B
Read
30
tn+2
Column = A
Dout
out
A0
tn+3
out
A1
NOP
out
B0
tn+4
Column = B
Dout
out
B1
EDD51323DBH-LS
out
B2
tn+5
out
B3
tn+6
CL = 3
BL = 4
Bank0
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