edd51323dbh-ls Elpida Memory, Inc., edd51323dbh-ls Datasheet - Page 50
![no-image](/images/no-image-200.jpg)
edd51323dbh-ls
Manufacturer Part Number
edd51323dbh-ls
Description
512m Bits Ddr Mobile Ram
Manufacturer
Elpida Memory, Inc.
Datasheet
1.EDD51323DBH-LS.pdf
(59 pages)
- Current page: 50 of 59
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Mode Register Set Cycle
Read/Write Cycle
Preliminary Data Sheet E1432E11 (Ver. 1.1)
Address
Address
/RAS
/CAS
DQS
CKE
/WE
/RAS
/CAS
DQS
/CK
/CS
DM
CKE
DQ
/WE
CK
BA
/CK
/CS
DM
DQ
CK
BA
VIH
Bank 0
Active
R:a
VIH
T0
Precharge
If needed
High-Z
High-Z
valid
T0
T1
T1
tRP
T2
Bank 0
Read
T2
C:a
T3
Mode
register
set
code
code
T3
Bank 3
Active
R:b
T4
tMRD
T4
T5
tRWD
Bank 3
Active
R: b
T5
T6
a
Read
T6
50
T7
Bank 3
Write
T7
T8
C:b
Bank 3
Read
C: b
T8
T9
b
Write
tWRD
T9
T10
Bank 3
Precharge
T10
T11 Tn
T11
b
Bank 3
Read
EDD51323DBH-LS
C:b''
Tn+1 Tn+2 Tn+3 Tn+4
T12
Read cycle
CL = 3
BL = 4
CL = 3
BL = 4
T13
= Don't care
= Don't care
T14
b’’
Read
T15
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