PLL202-108 PhaseLink (PLL), PLL202-108 Datasheet - Page 7

• Manufacturer Part Number: PLL202-108
• Description: Ali, Via, Sis, Intel 440BX Chipset FTGS , I2C Programmable: Skew / SST / Frequency / Drive
• Manufacturer: PhaseLink (PLL)

4. BYTE 3: PCI Clock Register (1=Enable, 0=Disable)
5. BYTE 4: Vendor ID and Revision ID Register
6. BYTE 5: Output Control Register
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Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
Bit
Bit
Pin#
Pin#
Pin#
33,34
29,30
20
19
18
15
14
13
12
20
19
18
15
14
13
12
9
9
8
7
6
5
-
-
Programmable Clock Generator for ALI 1681 P4 Chip Sets
Default
Default
Default
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Description
PCI_STOP# setting for PCIF (0=Free Running, 1=Stopped)
PCI_STOP# setting for PCI0 (0=Free Running, 1=Stopped)
PCI_STOP# setting for PCI1 (0=Free Running, 1=Stopped)
PCI_STOP# setting for PCI2 (0=Free Running, 1=Stopped)
PCI_STOP# setting for PCI3 (0=Free Running, 1=Stopped)
PCI_STOP# setting for PCI4 (0=Free Running, 1=Stopped)
PCI_STOP# setting for PCI5 (0=Free Running, 1=Stopped)
PCI_STOP# setting for PCI6 (0=Free Running, 1=Stopped)
Description
PCIF (1=Active 0=Inactive)
PCI0 (1=Active 0=Inactive)
PCI1 (1=Active 0=Inactive)
PCI2 (1=Active 0=Inactive)
PCI3 (1=Active 0=Inactive)
PCI4 (1=Active 0=Inactive)
PCI5 (1=Active 0=Inactive)
PCI6 (1=Active 0=Inactive)
Description
PCI7 (1=Active 0=Inactive)
PCI8 (1=Active 0=Inactive)
HTT[C/T]0 (1=Active, 0=Inactive)
HTT[C/T]1 (1=Active, 0=Inactive)
(Reserved)
(Reserved)
REF1 (1=Active, 0=Inactive)
REF0 (1=Active, 0=Inactive)
PLL202-108
Rev 8/20/02 Page 7