ssd1329 ETC-unknow, ssd1329 Datasheet - Page 18
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ssd1329
Manufacturer Part Number
ssd1329
Description
128 X 128 Oled Segment / Common Driver With Controller Equips With 16 Gray Scale Levels And 64 Hard Icon Lines
Manufacturer
ETC-unknow
Datasheet
1.SSD1329.pdf
(58 pages)
- Current page: 18 of 58
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8.1.3 MPU Serial Interface
The serial interface consists of serial clock SCLK, serial data SDIN, D/C#, CS#. In SPI mode, D0 acts as
SCLK, D1 acts as SDIN. For the unused data pins, D2 should be left open. The pins from D3 to D7, E and
R/W# can be connected to an external ground.
SDIN is shifted into an 8-bit shift register on every rising edge of SCLK in the order of D7, D6, ... D0. D/C#
is sampled on every eighth clock and the data byte in the shift register is written to the Graphic Display Data
RAM (GDDRAM) or command register in the same clock.
Under serial mode, only write operations are allowed. And during data writing, an additional NOP command
should be inserted before the CS# goes HIGH as shown in Figure 8-3
SCLK(D0)
Solomon Systech
SDIN(D1)
SDIN/
SCLK
D/C#
CS#
D7
DB1
Figure 8-3 : Display data write procedure in SPI mode
Function
Write command
Write data
D6
Table 8-4 : Control pins of Serial interface
DB2
D5
E
Tie LOW
Tie LOW
D4
R/W#
Tie LOW
Tie LOW
DBn
D3
Dec 2005 P 18/58
CS#
L
L
NOP COMMAND
D2
D/C#
L
H
D1
Rev 1.1
SSD1329
D0
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