PLL502-12 PhaseLink (PLL), PLL502-12 Datasheet - Page 4

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PLL502-12

Manufacturer Part Number
PLL502-12
Description
, 12-25MHz In, 96-200MHz Out, LVDS
Manufacturer
PhaseLink (PLL)
Datasheet
5. Jitter and Phase Noise specification
Note: Phase Noise measured at VIN = 0V
6. LVDS Electrical Characteristics
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Period jitter RMS at 155MHz
Accumulated jitter RMS at
155MHz
Integrated jitter RMS at 155MHz
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Phase Noise relative to carrier
Output Differential Voltage
V
Output High Voltage
Output Low Voltage
Offset Voltage
Offset Magnitude Change
Power-off Leakage
Output Short Circuit Current
96MHz – 200MHz Low Phase Noise LVDS VCXO (12 – 25MHz Crystals)
DD
Magnitude Change
PARAMETERS
PARAMETERS
With capacitive decoupling
between VDD and GND.
With capacitive decoupling
between VDD and GND. Over
10,000 cycles.
Integrated 12 kHz to 20 MHz
155MHz @10Hz offset
155MHz @100Hz offset
155MHz @1kHz offset
155MHz @10kHz offset
155MHz @100kHz offset
SYMBOL
I
I
V
V
V
V
OXD
OSD
V
V
OD
OH
OS
OL
OD
OS
CONDITIONS
V
out
CONDITIONS
(see figure)
R
= V
V
L
DD
= 100
DD
= 0V
or GND
MIN.
1.125
MIN.
Preliminary
247
-50
0.9
0
TYP.
TBM
-112
-125
-123
-60
-90
9
3
TYP.
-5.7
355
1.4
1.1
1.2
3
PLL502-12
1
MAX.
4
1.375
MAX.
Rev 7/15/02 Page 4
454
1.6
50
25
-8
10
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
UNITS
UNITS
ps
ps
ps
mV
mV
mV
mA
uA
V
V
V

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