h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 199
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
- Current page: 199 of 1061
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6.3.4
In the H8S/2138 Group and H8S/2134 Group, an I/O select signal (IOS) can be output, with the
signal output going low when the designated external space is accessed.
Figure 6.2 shows an example of IOS signal output timing.
Enabling or disabling of IOS signal output is controlled by the setting of the IOSE bit in SYSCR.
In expanded mode, this pin operates as the AS output pin after a reset, and therefore the IOSE bit
in SYSCR must be set to 1 in order to use this pin as the IOS signal output. See section 8, I/O
Ports, for details.
The range of addresses for which the IOS signal is output can be set with bits IOS1 and IOS0 in
BCR. The IOS signal address ranges are shown in table 6.4.
Table 6.4
Note:
IOS1
0
1
Address bus
IOS
* In the H8S/2138 F-ZTAT A-mask version, the address range is from H'(FF)F000 to
I/O Select Signal
H'(FF)F7FF.
IOS
IOS Signal Output Range Settings
IOS
IOS
IOS0
0
1
0
1
Figure 6.2 IOS
IOS
IOS
IOS
IOS Signal Output Range
H'(FF)F000 to H'(FF)F03F
H'(FF)F000 to H'(FF)F0FF
H'(FF)F000 to H'(FF)F3FF
H'(FF)F000 to H'(FF)FE4F *
T
1
External address in IOS set range
IOS
IOS
IOS Signal Output Timing
Bus cycle
T
Rev. 4.00 Jun 06, 2006 page 145 of 1004
2
Section 6 Bus Controller
T
3
REJ09B0301-0400
(Initial value)
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