h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 337
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
- Current page: 337 of 1061
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Bit 4—Input Edge Select D (IEDGD): Selects the rising or falling edge of the input capture D
signal (FTID).
Bit 3—Buffer Enable A (BUFEA): Selects whether ICRC is to be used as a buffer register for
ICRA.
Bit 2—Buffer Enable B (BUFEB): Selects whether ICRD is to be used as a buffer register for
ICRB.
Bits 1 and 0—Clock Select (CKS1, CKS0): Select external clock input or one of three internal
clock sources for the FRC. External clock pulses are counted on the rising edge of signals input to
the external clock input pin (FTCI).
Bit 4
IEDGD
0
1
Bit 3
BUFEA
0
1
Bit 2
BUFEB
0
1
Bit 1
CKS1
0
1
Description
Capture on the falling edge of FTID
Capture on the rising edge of FTID
Description
ICRC is not used as a buffer register for input capture A
ICRC is used as a buffer register for input capture A
Description
ICRD is not used as a buffer register for input capture B
ICRD is used as a buffer register for input capture B
Bit 0
CKS0
0
1
0
1
Description
External clock source (rising edge)
/2 internal clock source
/8 internal clock source
/32 internal clock source
Rev. 4.00 Jun 06, 2006 page 283 of 1004
Section 11 16-Bit Free-Running Timer
REJ09B0301-0400
(Initial value)
(Initial value)
(Initial value)
(Initial value)
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