h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 423
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
- Current page: 423 of 1061
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13.3.9
Using the signals generated/selected with timer connection, it is possible to generate a waveform
based on the composite synchronization signal (blanking waveform).
One kind of blanking waveform is generated by combining HFBACKI and VFBACKI inputs,
with the phase polarity made positive by means of bits HFINV and VFINV in TCONRI, with the
IVO signal.
The composition logic is shown in figure 13.9.
Mode
Separate
mode
HFBACKI input (positive)
VFBACKI input (positive)
IVO signal (positive)
CBLANK Output
IVI Signal
VSYNCI
input
Figure 13.9 CBLANK Output Waveform Generation
IVO Signal
IVI signal (without fall
modification or IHI
synchronization)
IVI signal (without fall
modification, with IHI
synchronization)
IVI signal (with fall
modification, without IHI
synchronization)
IVI signal (with fall
modification and IHI
synchronization)
IVG signal
Falling edge sensing
Rising edge sensing
Section 13 Timer Connection [H8S/2138 Group]
Meaning of IVO Signal
VSYNCI input (vertical synchronization signal)
is output directly
Meaningless unless VSYNCI input (vertical
synchronization signal) is synchronized with
HSYNCI input (horizontal synchronization
signal)
VSYNCI input (vertical synchronization signal)
fall is modified before output
VSYNCI input (vertical synchronization signal)
fall is modified and signal is synchronized with
HSYNCI input (horizontal synchronization
signal) before output
Internal synchronization signal is output
Reset
Set
Rev. 4.00 Jun 06, 2006 page 369 of 1004
Q
REJ09B0301-0400
CBLANK signal
(positive)
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