h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 724
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
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Section 23 Clock Pulse Generator
23.1.2
The clock pulse generator is controlled by the standby control register (SBYCR) and low-power
control register (LPWRCR). Table 23.1 shows the register configuration.
Table 23.1 CPG Registers
Name
Standby control register
Low-power control register
Note:
23.2
23.2.1
SBYCR is an 8-bit readable/writable register that performs power-down mode control.
Only bits 0 to 2 are described here. For a description of the other bits, see section 24.2.1, Standby
Control Register (SBYCR).
SBYCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 2 to 0—System Clock Select 2 to 0 (SCK2 to SCK0): These bits select the bus master clock
for high-speed mode and medium-speed mode.
When operating the device after a transition to subactive mode or watch mode bits SCK2 to SCK0
should all be cleared to 0.
Rev. 4.00 Jun 06, 2006 page 670 of 1004
REJ09B0301-0400
Bit
Initial value
Read/Write
* Lower 16 bits of the address.
Register Configuration
Register Descriptions
Standby Control Register (SBYCR)
SSBY
R/W
7
0
STS2
R/W
Abbreviation
SBYCR
LPWRCR
6
0
STS1
R/W
5
0
R/W
R/W
R/W
STS0
R/W
4
0
—
—
3
0
Initial Value
H'00
H'00
SCK2
R/W
2
0
SCK1
R/W
1
0
Address *
H'FF84
H'FF85
SCK0
R/W
0
0
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