h8s-2158 Renesas Electronics Corporation., h8s-2158 Datasheet - Page 603

• Manufacturer Part Number: h8s-2158
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

I
(Master transmit mode)
Other device
(Master transmit mode)
I
(Slave receive mode)
2
2
Though it is prohibited in the normal I
MST bit is erroneously set to 1 and a transition to master mode is occurred during data
transmission or reception in slave mode. In multi-master mode, pay attention to the setting of
the MST bit when a bus conflict may occur. In this case, the MST bit in the ICCR register
should be set to 1 according to the order below.
(a) Make sure that the BBSY flag in the ICCR register is 0 and the bus is free before setting
(b) Set the MST bit to 1.
(c) To confirm that the bus was not entered to the busy state while the MST bit is being set,
Note: Above restriction can be cleared by setting bits FNC1 and FNC0 in the ICXR register.
C bus interface
C bus interface
the MST bit.
check that the BBSY flag in the ICCR register is 0 immediately after the MST bit has been
set.
Figure 17.29 Diagram of Erroneous Operation when Arbitration Is Lost
S
S
S
• Receive address is ignored
SLA
SLA
SLA
Transmit data match
Transmit timing match
R/W
R/W
R/W
2
C protocol, the same problem may occur when the
A
A
A
• Arbitration is lost
• The AL flag in ICSR is set to 1
• Automatically transferred to slave
• Receive data is recognized as
• When the receive data matches to
an address
the address set in the SAR or SARX
register, the I
as a slave device
receive mode
SLA
DATA1
DATA2
Rev. 3.00 Jan 25, 2006 page 551 of 872
Transmit data does not match
2
C bus interface operates
R/W
Section 17 I
A
A
2
C Bus Interface (IIC)
DATA4
DATA3
REJ09B0286-0300
Data contention
A
A