h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 115

• Manufacturer Part Number: h8s-2172
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
• Manufacturer: Renesas Electronics Corporation.

This LSI has an on-chip bus controller (BSC) that manages the external address space divided into
four areas. The bus specifications such as the bus width and number of access states can be set
independently for each area. Therefore multiple memories and external I/O devices can be
connected easily to each area.
The bus controller also has a bus arbitration function, and controls the operation of the bus
mastersthe CPU and DMA controller (DMAC). A block diagram of the bus controller is shown
in figure 6.1.
6.1
• Manages external address space in area units
• Basic bus interface
• DRAM interface
• Idle cycle insertion
• Write buffer function
Manages the external address space divided into four areas of 2/10 Mbytes
Bus specifications can be set independently for each area
DRAM interface can be set
Chip select signals (CS0 to CS3) can be output for areas 0 to 3
8-bit access or 16-bit access can be selected for each area
2-state access or 3-state access can be selected for each area
Program wait states can be inserted for each area
CS assertion period extend states can be inserted for each area
DRAM interface can be set for area 2
Multiplex output of row/column address (8/9/10/11 bits)
Byte and word control by CAS2 method
Burst operation can be performed in high-speed page mode
Tp cycle insertion to ensure RAS precharge time
CAS before RAS refresh (CBR refresh) or self refresh can be selected
Idle cycles can be inserted when external read cycles between different areas are continued
Idle cycles can be inserted when write cycles are continued after a read cycle
Idle cycles can be inserted when accesses between different areas are continued
An external write cycle and internal access can be executed in parallel
DMAC single address mode and internal access can be executed in parallel
Features
Section 6 Bus Controller (BSC)
Rev. 2.00, 03/04, page 83 of 534