h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 130
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 130 of 570
- Download datasheet (5Mb)
6.3.8
REFCR specifies DRAM interface refresh control.
Rev. 2.00, 03/04, page 98 of 534
Bit
1
0
Bit
15
14
Bit Name
RCD1
RCD0
Bit Name
CMF
CMIE
Refresh Control Register (REFCR)
Initial
Value
0
0
Initial
Value
0
0
R/W
R/W
R/W
R/W
R/(W)* Compare Match Flag
R/W
Description
RAS-CAS Wait Control
These bits select a wait cycle to be inserted between
the RAS assert cycle and CAS assert cycle.
00: Wait cycle not inserted
01: 1-state wait cycle inserted
10: 2-state wait cycle inserted
11: 3-state wait cycle inserted
Description
Status flag that indicates a match between the values of
RTCNT and RTCOR.
[Clearing conditions]
•
•
[Setting condition]
When RTCOR = RTCNT
Compare Match Interrupt Enable
Enables or disables interrupt requests (CMI) by the
CMF flag when the CMF flag is set to 1.
This bit is valid when refresh control is not performed
(RFSHE = 0). When the refresh control is performed
(RFSHE = 1), this bit is always cleared to 0 and cannot
be modified.
0: Interrupt request by CMF flag disabled
1: Interrupt request by CMF flag enabled
When 0 is written to CMF after reading CMF = 1
while the RFSHE bit is cleared to 0
When CBR refreshing is executed while the RFSHE
bit is set to 1
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