h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 132
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 132 of 570
- Download datasheet (5Mb)
Note: Only 0 can be written, to clear the flag.
Rev. 2.00, 03/04, page 100 of 534
Bit
5
4
3
2
1
0
Bit Name
RLW1
RLW0
SLFRF
TPCS2
TPCS1
TPCS0
Initial
Value
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Refresh Cycle Wait Control
These bits select the number of wait states to be
inserted in a DRAM interface CAS-before-RAS refresh
cycle.
00: No wait state inserted
01: 1 wait state inserted
10: 2 wait states inserted
11: 3 wait states inserted
Self-Refresh Enable
If this bit is set to 1, DRAM self-refresh mode is
selected when a transition is made to the software
standby state. This bit is valid when the RFSHE bit is
set to 1, enabling refresh operations.
0: Self-refreshing is disabled
1: Self-refreshing is enabled
Self-Refresh Precharge Cycle Control
These bits select the number of states in the precharge
cycle immediately after self-refreshing.
The number of states in the precharge cycle
immediately after self-refreshing are added to the
number of states set by bits TPC1 and TPC0 in
DRACCR.
000: [TPC set value] states
001: [TPC set value + 1] states
010: [TPC set value + 2] states
011: [TPC set value + 3] states
100: [TPC set value + 4] states
101: [TPC set value + 5] states
110: [TPC set value + 6] states
111: [TPC set value + 7] states
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