h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 174
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 174 of 570
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6.7
6.7.1
When this LSI accesses external address space, it can insert an idle cycle (T
in the following three cases: (1) when read accesses in different areas occur consecutively or when
an external access cycle occurs after a single address transfer, (2) when (1) occurs and a write
cycle occurs immediately after a read cycle, and (3) when (1) and (2) occur and a read cycle
occurs immediately after a write cycle. A condition for idle cycle insertion can be selected with
the IDLE1 and IDLE0 bits in BCR. The number of idle cycles to be inserted can be set from one
to four states by setting the IDLC1 and IDLC0 bits in BCR. By inserting an idle cycle it is
possible, for example, to avoid data collisions between ROM, etc., with a long output floating
time, and high-speed memory, I/O interfaces, and so on.
Rev. 2.00, 03/04, page 142 of 534
Read
Write
Figure 6.43 Example of DACK Output Timing when DDS = 0 (RAST = 0, CAST = 1)
Idle Cycle
Operation
φ
Address bus
Data bus
Data bus
(
(
(
(
(
,
)
)
)
)
)
T
p
Row address
High
High
T
r
T
c1
Column address
T
c2
i
) between bus cycles
T
c3
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