h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 365
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 365 of 570
- Download datasheet (5Mb)
12.3.13 Packet Enable Register 0i (PKTE0i)
The number of transmit data is written in PKTE0i after writing transmit data in EPDR0i. Then
transmit data becomes valid and data is transmitted by the next IN token. Data is not transmitted
only by writing data in EPDR0i.
The number of data bytes written in EPDR0i must match the number of transmit data bytes to be
written in PKTE0i.
12.3.14 Packet Enable Register 2 (PKTE2)
The number of transmit data is written in PKTE2 after writing transmit data in EPDR2. Then
transmit data becomes valid and data is transmitted by the next IN token. Data is not transmitted
only by writing data in EPDR2.
The number of data bytes written in EPDR2 must match the number of transmit data bytes to be
written in PKTE2.
12.3.15 Packet Enable Register 3 (PKTE3)
The number of transmit data is written in PKTE3 after writing transmit data in EPDR3. Then
transmit data becomes valid and data is transmitted by the next IN token. Data is not transmitted
only by writing data in EPDR3.
The number of data bytes written in EPDR3 must match the number of transmit data bytes to be
written in PKTE3.
Bit
31 to 0
Bit
31 to 0
Bit
31 to 0
Bit Name
Bit Name
Bit Name
D31 to D0 All 0
D31 to D0 All 0
D31 to D0 All 0
Initial
Value
Initial
Value
Initial
Value
R/W
W
R/W
W
R/W
W
Description
Number of Transmit Data
Description
Number of Transmit Data
Description
Number of Transmit Data
Rev. 2.00, 03/04, page 333 of 534
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