h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 422
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 422 of 570
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• RAM Emulation Register (RAMER)
RAMER specifies the area of flash memory to be overlapped with part of RAM when emulating
realtime flash memory programming. RAMER is initialized to H'00 by a power-on reset and in
hardware standby mode. It is not initialized in software standby mode. RAMER settings should be
made in user mode or user program mode.
Flash memory area divisions are shown in table 14.4. To ensure correct operation of the emulation
function, the ROM for which RAM emulation is performed should not be accessed immediately
after this register has been modified. Normal execution of an access immediately after register
modification is not guaranteed.
Rev. 2.00, 03/04, page 390 of 534
Bit
7 to 4
3
2
1
0
Bit Name
RAMS
RAM2
RAM1
RAM0
Initial
Value
All 0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
RAM Select
Specifies selection or non-selection of flash memory
emulation in RAM. When RAMS is 1, all flash memory
blocks are program/erase-protected.
0: Emulation not selected
1: Emulation selected
Flash Memory Area Selection
These bits are used together with bit 3 to select the flash
memory area to be overlapped with RAM (see table
14.4).
Program/erase-protection of all flash memory blocks
is disabled.
Program/erase-protection of all flash memory blocks
is enabled.
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