h8s-2172 Renesas Electronics Corporation., h8s-2172 Datasheet - Page 439
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h8s-2172
Manufacturer Part Number
h8s-2172
Description
Renesas 16-bit Single-chip Microcomputer H8s Family H8s-2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2172.pdf
(570 pages)
- Current page: 439 of 570
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Programming Procedure in User Program Mode: The procedures for download, initialization,
and programming are shown in figure 14.11.
The procedure program must be executed in an area other than the flash memory to be
programmed. Especially the part where the SCO bit in FCCS is set to 1 for downloading must be
executed in the on-chip RAM.
The area that can be executed in the steps of the user procedure program (on-chip RAM, user
MAT, and external space) is shown in section 14.4.4, Procedure Program and Storable Area for
Programming Data.
The following description assumes the area to be programmed on the user MAT is erased and
program data is prepared in the consecutive area. When erasing is not executed, erasing is
executed before writing.
128-byte programming is performed in one program processing. When more than 128-byte
programming is performed, programming destination address/program data parameter is updated
in 128-byte units and programming is repeated.
JSR FTDAR setting + 32
Select on-chip program
to be downloaded and
destination by FTDAR
procedure program
Set SCO to 1 and
execute download
Start programming
specify download
Set FKEY to H'A5
Set the FPEFEQ
Clear FKEY to 0
DPFR = 0?
Initialization
FPFR = 0?
parameter
1
Yes
Yes
Initialization error processing
Download error processing
No
No
Figure 14.11 Programming Procedure
1.
2.
3.
4.
5.
6.
7.
8.
No
JSR FTDAR setting + 16
Disable interrupts and bus
Set parameters to ER1
(FMPAR and FMPDR)
procedure program
End programming
Set FKEY to H'5A
Rev. 2.00, 03/04, page 407 of 534
Clear FKEY to 0
master operation
programming is
other than CPU
Programming
Required data
FPFR = 1?
completed?
and ER0
1
Yes
Yes
Clear FKEY and
error processing
No
programming
9.
10.
11.
12.
13.
14.
15.
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