h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 99
h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
- Current page: 99 of 766
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Notes: 1. Lower 16 bits of the address.
4.3
A reset has the highest exception priority.
When the RES pin goes low, all processing halts and this LSI enters the reset state. To ensure that
this LSI is reset, hold the RES pin low for at least 20 ms at power-up. To reset the chip during
operation, hold the RES pin low for at least 20 states. A reset initializes the internal state of the
CPU and the registers of on-chip peripheral modules.
The chip can also be reset by overflow of the watchdog timer. For details, see section 12,
Watchdog Timer (WDT).
The interrupt control mode is 0 immediately after reset.
4.3.1
When the RES pin goes high after being held low for the necessary period, this LSI starts reset
exception handling as follows:
1. The internal state of the CPU and the registers of the on-chip peripheral modules are
2. The reset exception handling vector address is read and transferred to the PC, and program
Figures 4.1 and 4.2 show examples of the reset sequence.
Exception Source
Internal interrupt*
initialized, the T bit in EXR is cleared to 0, and the I bit in EXR and CCR is set to 1.
execution starts from the address indicated by the PC.
2. Not available in this LSI.
3. For details of internal interrupt vectors, see section 5.5, Interrupt Exception Handling
4. For direct transitions, see section 21.10, Direct Transitions
Reset
Reset Exception Handling
Vector Table.
3
Vector Number
24
127
Normal Mode*
H'0030 to H'0031
H'00FE to H'00FF
Rev. 2.00 Dec. 05, 2005 Page 61 of 724
Vector Address*
2
Section 4 Exception Handling
Advanced Mode
H'0060 to H'0063
H'01FC to H'01FF
REJ09B0200-0200
1
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