AD5522JSVD AD [Analog Devices], AD5522JSVD Datasheet - Page 24

• Manufacturer Part Number: AD5522JSVD
• Description: Quad Parametric Measurement Unit With Integrated 16-Bit Level Setting DACs
• Manufacturer: AD [Analog Devices]

AD5522
Offset and Gain registers for the FIN DAC
The FIN (force amplifier input) DAC level contains
independent offset and gain control registers that allow the user
to digitally trim offset and gain. There are six sets of x1, m and c
registers, one set (x1, m and c) for the force voltage range, and
one set for each of the force current ranges (4 internal current
ranges and 1 external current range). Six x2 registers store
calculated DAC values ready to load to the DAC register on a
mode change.
Offset and Gain registers for the COMPARATOR DACs
The Comparator DAC levels contain independent offset and
gain control registers that allow the user to digitally trim offset
and gain. There are six sets of (x1, m and c) registers, one set for
the voltage mode, and one set for each of the four internal
current ranges and one set for the external current range. In this
way, x1 may also be preprogrammed, so switching different
modes, allows for efficient switching into the required compare
mode. Six x2 registers store cached calculated DAC values ready
to load to the DAC register on a mode change.
Offset and Gain registers for the Clamp DACs
The clamp DAC levels contain independent offset and gain
control registers that allow the user to digitally trim offset and
gain. There are just two sets of registers, one for the voltage
mode and another register set (x1, m and c) for all five current
ranges. Two x2 registers store cached calculated DAC values
ready to load to the DAC register on a PMU mode change.
Serial I/F
VREF
VREF
16
16
16
Serial I/F
M REG
C REG
X1 REG
16
16
16
16
16
16
Serial I/F
Figure 22. Comparator Registers
16
16
16
16
16
16
Figure 21. FIN DAC Registers
*6
Figure 23. Clamp Registers
C REG
X1 REG
M REG
M REG
C REG
X1 REG
M REG
C REG
X1 REG
M REG
C REG
X1 REG
*6
*6
X2 REG
OFFSET DAC
VREF
16
FIN DAC
X2 REG
X2 REG
X2 REG
X2 REG
16-Bit
16
16
16
16
CPH DAC
CPL DAC
CLH DAC
CLL DAC
16-Bit
16-Bit
16-Bit
16-Bit
CPL
CPH
CLH
CLL
FIN
Rev. PrM | Page 24 of 48
V
One buffered analog input supplies all 20 DACs with the
necessary reference voltage to generate the required DC levels.
REFERENCE SELECTION
The voltage applied to the V
voltage range and span applied to the force amplifier, clamp and
comparator inputs. This device can be used with a reference
input ranging from 2V to 5V, however, for most applications, a
reference input of 5V or 2.5V will be sufficient to meet all
voltage range requirements. The DAC amplifier gain is 4.5,
which gives a DAC output span of 22.5V. The DACs have offset
and gain registers which can be used to calibrate out system
errors.
In addition, the gain register can be used to reduce the DAC
output range to the desired force voltage range. The Force DAC
will retain 16 bit resolution even with a gain register setting of
quarter scale (0x4000). Therefore, from a single 5V reference, it
is possible to get a voltage span as high as 22.5V or as low as
5.625V all from one 5V reference.
When using the offset and gain registers, the chosen output
range should take into account the system offset and gain errors
that need to be trimmed out. Therefore, the chosen output
range should be larger than the actual, required range.
When using low supply voltages, ensure that there is sufficient
headroom and footroom for the required force voltage range.
Also, note that with a supply differential of less than 18V and a
full scale current range requirement, it is necessary to reduce
the current measure in amp gain to 5 so the feedback path can
swing through the full range.
Also, the forced current range will only be the quoted full scale
range with an applied reference of 5V or 2.5V (with ISENSE
AMP gain = 5).
For other voltage/current ranges, the required reference level
can be calculated as follows:
REF
1.
2.
3.
4.
5.
Identify the nominal range required
Identify the maximum offset span and the maximum
gain required on the full output signal range.
Calculate the new maximum output range including
the expected maximum offset and gain errors.
Choose the new required VOUT
keeping the VOUT limits centered on the nominal
values. Note that AV
sufficient headroom.
Calculate the value of V
V
REF
= (VOUT
Preliminary Technical Data
REF
MAX
DD
pin determines the output
– VOUT
and AV
REF
as follows:
SS
MIN
max
must provide
)/4.5
and VOUT
min
,