ICS1892 Integrated Circuit Systems, ICS1892 Datasheet - Page 95
ICS1892
Manufacturer Part Number
ICS1892
Description
10Base-T/100Base-TX Integrated PHYceiver
Manufacturer
Integrated Circuit Systems
Datasheet
1.ICS1892.pdf
(148 pages)
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8.13 Register 18: 10Base-T Operations Register
8.13.1 ICS Reserved (bit 18.15)
ICS1892, Rev. D, 2/26/01
The 10Base-T Operations Register provides an STA with the ability to monitor and control the ICS1892
activity while the ICS1892 is operating in 10Base-T mode.
Note:
1. For an explanation of acronyms used in
2. During any write operation to any bit in this register, the STA must write the default value to all
Table 8-20. 10Base-T Operations Register (register 18 [0x12])
ICS reserves this bit for future use. Functionally, this bit is equivalent to an IEEE Reserved bit. When this
reserved bits is:
•
•
In general, ICS uses some reserved bits to invoke auxiliary functions. To ensure proper operation of the
ICS1892, an STA must maintain the default value of these bits. Therefore, ICS recommends that an STA
always write the default value of any reserved bits during all management register write operations.
18.15
18.14
18.13
18.12
18.11
18.10
18.9
18.8
18.7
18.6
18.5
18.4
18.3
18.2
18.1
18.0
Bit
Read by an STA, the ICS1892 returns a logic zero.
Written to by an STA, the STA must use the default value specified in this data sheet.
ICS1892
Reserved bits.
ICS reserved
Polarity reversed
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
Jabber inhibit
ICS reserved
Auto polarity inhibit
SQE test inhibit
Link Loss inhibit
Squelch inhibit
Definition
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
Read unspecified
Normal polarity
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Normal Jabber behavior
Read unspecified
Polarity automatically
corrected
Normal SQE test behavior
Normal Link Loss behavior Link Always = Link Pass
Normal squelch behavior
When Bit = 0
Table
95
8-20, see
Read unspecified
Polarity reversed
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Jabber Check disabled
Read unspecified
Polarity not automatically
corrected
SQE test disabled
No squelch
When Bit = 1
Chapter 1, “Abbreviations and
Chapter 8 Management Register Set
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/1
cess
RW
RW
RW
RW
RW
Ac-
RO
February 26, 2001
SC
SF
LH
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Acronyms”.
fault
De-
0
0
–
–
–
–
–
–
–
–
0
1
0
0
0
0
Hex
–
–
–
0
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