PCM1712 Burr-Brown Corporation, PCM1712 Datasheet - Page 12

no-image

PCM1712

Manufacturer Part Number
PCM1712
Description
DIGITAL-TO-ANALOG CONVERTER
Manufacturer
Burr-Brown Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCM1712U
Manufacturer:
BB
Quantity:
5 510
Part Number:
PCM1712U
Manufacturer:
BB
Quantity:
20 000
Part Number:
PCM1712U/T1
Manufacturer:
BB
Quantity:
20 000
Part Number:
PCM1712V
Quantity:
2
DOUBLE-SPEED DUBBING
Double-speed dubbing is enabled when B7 is high. Since f
is set at 44.1kHz, the system clock in double-speed mode is
at 192fs.
MODE 2 CONTROLS
This mode is enabled when the first three bits on MD are 1,
0, 1. Mode 2 allows for the following functions:
SAMPLE RATE CLOCK POLARITY
B6 controls the polarity of the sample rate clock (LRCIN)
polarity. When B6 is low, data will be accepted on the left
channel when LRCIN is high, and on the right channel when
LRCIN is low. When B6 is high, data will be accepted on the
right channel when LRCIN is high, and on the left channel
when LRCIN is low.
INPUT FORMAT
Normal input mode for PCM1712 is MSB first, right justi-
fied. PCM1712 may also be operated with IIS input format.
When B7 is low, the input format is “normal”. When B7 is
high, the input format is “IIS”.
DEFAULT MODE
At initial power-on, default settings for PCM1712 are
44.1kHz f
infinite zero detect on, 16-bit input LRCIN left channel high,
and normal input mode.
FIGURE 6. Timing Requirement for External System Clock
In case of system clock inputs to XTI from external, system clock should
be input with the following condition.
V
V
IH
IIL
LR Polarity
Input Format
S
, de-emphasis off, mute off, double speed off,
(XTi).
®
PCM1712
T
H
Controls Left/Right Channel Select
Normal/IIS (Philips format)
T
L
V
V
T
T
H
L
IH
IL
< 10ns
> 10ns
< 0.28V
> 0.64V
DD
DD
S
12
SYSTEM CLOCK
NORMAL/DOUBLE-SPEED DUBBING
For most CD playback applications operating at 384fs, the
system clock frequency must be 16.9344MHz, in both the
normal mode and double-speed dubbing mode. Table VIII
illustrates the relationship between fs and output clock
frequency in both modes.
TABLE VIII. Relationship Between Normal/Double Speed
EXTERNAL SYSTEM CLOCK
Figure 7 is a diagram showing the internal clock in conjunc-
tion with an external crystal oscillator.
FIGURE 7. External Crystal Oscillator.
Figure 8 is a diagram showing the internal clock with an
external clock source, instead of an oscillator. An external
system clock (input to XTI) must meet timing requirement
which is shown in Figure 6.
PARAMETER
XTI Input Clock Frequency
XTI Frequency
CLKO Output Clock Frequency
CLKO (XTI)
SAMPLING FREQUENCY
C
44.1kHz
1
32kHz
48kHz
, C
and fs.
2
: 10pF ~ 22pF
SYSTEM CLOCK
(f
16.9344MHz
H (Normal)
S
384fs
384fs
384fs
Internal System Clock
= 44.1kHz)
384fs
384fs
C
XTI
1
DSD
FREQUENCY
L (Double Speed)
Crystal
12.2880MHz
16.9344MHz
18.4320MHz
(f
16.9344MHz
S
= 88.2kHz)
192fs
192fs
XTO
C 2

Related parts for PCM1712