CS5158 Cherry Semiconductor Corporation, CS5158 Datasheet - Page 10

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CS5158

Manufacturer Part Number
CS5158
Description
CPU 5-Bit Synchronous Buck Controller
Manufacturer
Cherry Semiconductor Corporation
Datasheet

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Figure 13: OVP response to an input-to-output short circuit by pulling
the input voltage to ground.
External Output Enable Circuit
On/off control of the regulator can be implemented
through the addition of two additional discrete compo-
nents (see Figure 14). This circuit operates by pulling the
soft start pin high, and the V
circuit condition.
External Power Good Circuit
An optional Power Good signal can be generated through
the use of four additional external components (see Figure
15). The threshold voltage of the Power Good signal can be
adjusted per the following equation:
This circuit provides an open collector output that drives
the Power Good output to ground for regulator voltages
less than V
Figure 14: Implementing shutdown with the CS5158.
Trace 4 = 5V from PC Power Supply (2V/div.)
Trace 1 = Regulator Output Voltage (1V/div.)
Shutdown
Input
Power Good
V
Power Good
.
IN4148
5V
=
MMUN2111T1 (SOT-23)
(R1 + R2) × 0.65V
FFB
pin low, emulating a short
5
8
R2
V
SS
FFB
CS5158
Applications Information: continued
10
Figure 16: CS5158 demonstration board during power up. Power Good
signal is activated when output voltage reaches 1.70V.
Selecting External Components
The CS5158 can be used with a wide range of external
power components to optimize the cost and performance of
a particular design. The following information can be used
as general guidelines to assist in their selection.
NFET Power Transistors
Both logic level and standard MOSFETs can be used. The
reference designs derive gate drive from the 12V supply
which is generally available in most computer systems and
utilize logic level MOSFETs. Multiple MOSFETs may be
paralleled to reduce losses and improve efficiency and ther-
mal management.
Voltage applied to the MOSFET gates depends on the
application circuit used. Both upper and lower gate driver
outputs are specified to drive to within 1.5V of ground
when in the low state and to within 2V of their respective
bias supplies when in the high state. In practice, the MOS-
FET gates will be driven rail to rail due to overshoot caused
by the capacitive load they present to the controller IC. For
the typical application where V
Figure 15: Implementing Power Good with the CS5158.
Trace 3 = 12V Input (V
Trace 4 = 5V Input (2V/div.)
Trace 1 = Regulator Output Voltage (1V/div.)
Trace 2 = Power Good Signal (2V/div.)
CS5158
V
OUT
CC1
10k
R1
) and V
CC2
R2
6.2k
) (10V/div.)
CC1
5V
PN3904
= V
R3
10k
CC2
= 12V and 5V is
PN3904
Power Good
Ch 1 High
2.80V

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