CY7C09289 CYPRESS [Cypress Semiconductor], CY7C09289 Datasheet - Page 10

• Manufacturer Part Number: CY7C09289
• Description: 32K/64K X 16/18 Synchronous Dual Port Static RAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Switching Waveforms
Pipelined Read-to-Write-to-Read (OE = V
Pipelined Read-to-Write-to-Read (OE Controlled)
Notes:
Document #: 38-06040 Rev. **
24. Output state (HIGH, LOW, or High-Impedance) is determined by the previous cycle control signals.
25. CE
26. During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity.
ADDRESS
ADDRESS
DATA
DATA
DATA
DATA
0
CLK
R/W
CLK
R/W
CE
CE
CE
CE
and ADS = V
OUT
OUT
OE
IN
IN
0
1
0
1
t
t
t
t
t
t
SW
SC
SA
SW
SC
SA
IL
; CE
A
A
1
n
, CNTEN, and CNTRST = V
n
t
t
CH2
CH2
(continued)
t
t
CYC2
t
t
t
CYC2
t
t
t
HW
HC
HA
HW
HC
HA
t
t
CL2
CL2
A
READ
A
READ
n+1
n+1
t
t
CD2
CD2
IL
)
IH
[17, 24, 25, 26]
.
Q
t
t
SW
OHZ
n
[17, 24, 25, 26]
Q
n
t
SW
t
SD
D
A
A
n+2
n+2
t
n+2
HW
t
t
CKHZ
NO OPERATION
HD
t
HW
t
WRITE
SD
A
D
A
D
n+3
n+3
n+2
n+2
t
HD
WRITE
A
A
n+4
n+3
t
t
CKLZ
CKLZ
CY7C09279/89
CY7C09379/89
READ
READ
A
A
n+5
n+4
t
Page 10 of 18
t
CD2
CD2
Q
n+4
Q
n+3