CY7C68000 CYPRESS [Cypress Semiconductor], CY7C68000 Datasheet - Page 12

• Manufacturer Part Number: CY7C68000
• Description: TX2 USB 2.0 UTMI Transceiver
• Manufacturer: CYPRESS [Cypress Semiconductor]

12.0
The following recommendations should be followed to ensure
reliable high-performance operation.
Note:
Document #: 38-08016 Rev. *E
3.
• At least a four-layer impedance controlled boards are
• Specify impedance targets (ask your board vendor what
• To control impedance, maintain trace widths and trace
• Minimize stubs to minimize reflected signals.
• Connections between the USB connector shell and signal
required to maintain signal quality.
they can achieve).
spacing.
ground must be done near the USB connector.
Source for recommendations: EZ-USB FX2™ PCB Design Recommendations, http:///www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf High-
Speed USB Platform Design Guidelines, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.
CORNER
PIN #1
PCB Layout Recommendations
A
DIMENSIONS IN MM[INCHES] MIN.
REFERENCE JEDEC MO-220
Figure 11-2. 56-lead Quad Flatpack No Lead Package (8 x 8 mm) (SAWN VERSION)
TOP VIEW
7.90[0.311]
8.10[0.319]
MAX.
56-Lead QFN 8 x 8 mm (Sawn Version) LS56B
1.00[0.039] MAX.
[3]
PRELIMINARY
SIDE VIEW
C
0.08[0.003]
• Bypass/flyback caps on VBus, near connector, are recom-
• DPLUS and DMINUS trace lengths should be kept to within
• Maintain a solid ground plane under the DPLUS and
• It is preferred is to have no vias placed on the DPLUS or
• Isolate the DPLUS and DMINUS traces from all other signal
0.04[0.0015] MAX.
0.20[0.008] REF.
SEATING
PLANE
mended.
2 mm of each other in length, with preferred length of
20–30mm.
DMINUS traces. Do not allow the plane to be split under
these traces.
DMINUS trace routing.
traces by no less than 10 mm.
C
0.30[0.012]
0.50[0.020]
6.45[0.254]
6.55[0.258]
(PAD SIZE VARY
BY DEVICE TYPE)
0.18[0.007]
0.28[0.011]
BOTTOM VIEW
E-PAD
0.50[0.020]
CY7C68000
51-85187-*A
Page 12 of 14
CORNER
PIN #1