PCF8531U2D NXP [NXP Semiconductors], PCF8531U2D Datasheet - Page 25
PCF8531U2D
Manufacturer Part Number
PCF8531U2D
Description
34 x 128 pixel matrix driver Single-chip LCD controller and driver
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCF8531U2D.pdf
(51 pages)
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NXP Semiconductors
Table 11.
PCF8531
Product data sheet
Instruction
H1 and H0 = don’t care (H independent command page)
NOP
write data
set default H[1:0]
H1 = 0 and H0 = 0 (function and RAM command page)
instruction set
function set
set Y address of
RAM
set X address of
RAM
H1 = 0 and H0 = 1 (display setting command page)
multiplex rate
display control
bias system
H1 = 1 and H0 = 0 (HV-gen command page)
HV-gen control
HV-gen
configuration
Instruction set
I
command
RS
0
1
0
0
0
0
0
0
0
0
0
0
2
C-bus
Linear temperature compensation is supported in the PCF8531. The temperature
coefficient of V
Table
Fig 13. V
R/W
0
0
0
0
0
0
0
0
0
0
0
0
13).
[1]
LCD
I
DB7
0
D7
0
0
0
0
1
0
0
0
0
0
2
C-bus command byte
as a function of liquid crystal temperature
LCD
All information provided in this document is subject to legal disclaimers.
can be selected from eight values by setting bits TC[2:0] (see
DB6
0
D6
0
0
0
1
X6
0
0
0
0
0
V
Rev. 6 — 16 May 2011
LCD
DB5
0
D5
0
0
1
0
X5
0
0
0
0
0
DB4
0
D4
0
0
0
0
X4
0
0
1
0
0
D3
1
0
DB3
0
0
0
0
X3
0
1
0
1
0 °C
DB2
0
D2
0
0
PD
Y2
X2
1
D
1
0
BS2
DB1
0
D1
0
H1
V
Y1
X1
M1
IM
BS1
PRS
S1
mgs473
34 x 128 pixel matrix driver
T
DB0
0
D0
1
H0
0
Y0
X0
M0
E
BS0
HVE
S0
PCF8531
© NXP B.V. 2011. All rights reserved.
Description
no operation
write data to
display RAM
select H[1:0] = 0
select command
page
power-down
control; entry
mode
set Y address of
RAM; 0 ≤ Y ≤ 5
set X address of
RAM; 0 ≤ X ≤ 127
set multiplex rate
set display
configuration
set bias system
(BSx)
set V
programming
range
set voltage
multiplication
factor
LCD
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