PCA8534AH-Q900 NXP [NXP Semiconductors], PCA8534AH-Q900 Datasheet - Page 35
PCA8534AH-Q900
Manufacturer Part Number
PCA8534AH-Q900
Description
Universal LCD driver for low multiplex rates
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PCA8534AH-Q900.pdf
(44 pages)
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NXP Semiconductors
PCA8534A_2
Product data sheet
In a cascaded configuration only one PCA8534A master must be used as clock source.
All other PCA8534A in the cascade must be configured as slave such that they receive
the clock from the master.
If an external clock source is used, all PCA8534A in the cascade must be configured such
as to receive the clock from that external source (pin OSC connected to V
must be ensured that the clock tree is designed such that on all PCA8534A the clock
propagation delay from the clock source to all PCA8534A in the cascade is as equal as
possible since otherwise synchronization artefacts may occur.
In mixed cascading configurations, care has to be taken that the specifications of the
individual cascaded devices are met at all times.
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 1 June 2010
Universal LCD driver for low multiplex rates
PCA8534A
© NXP B.V. 2010. All rights reserved.
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