MAX5318 MAXIM [Maxim Integrated Products], MAX5318 Datasheet - Page 27

• Manufacturer Part Number: MAX5318
• Description: 18-Bit, High-Accuracy Voltage Output DAC with Digital Gain, Offset Control, and SPI Interface
• Manufacturer: MAXIM [Maxim Integrated Products]

Table 8. Two’s Complement DIN Examples
Several numerical examples for the MAX5318, as shown
in
set control changes the output voltage. The examples
assume a reference voltage of 4.096V. Note that if the
result of the calculation results in an under- or over-range
output voltage, V
respectively. An under-range output is less than 0V and
an over-range output is greater than V
The device is reset upon power-on, hardware reset using
RST, or software reset using register 0x4, bit 15, com-
mand RSTSW. After reset, the value of the input register,
the DAC latch and the output voltage are set to the values
defined by the M/Z input. If a hardware reset occurs dur-
ing a SPI programming frame, anything before and after
the reset for the frame will be ignored. A software reset
initiated through the SPI interface takes effect after the
end of the valid frame.
The output voltage can be set to either zero or mid-
scale upon power-up, or a hardware or software reset,
depending on the state of the M/Z input. After power-up,
if the device detects that this input is low, the output volt-
age is set to zero scale. If M/Z is high, the output voltage
is set to midscale.
Maxim Integrated
0x30000
0x10000
Table 7
DIN
18-Bit, High-Accuracy Voltage Output DAC with
and
V
Digital Gain, Offset Control, and SPI Interface
-1.024
1.024
DIN
Table
(V)
OUT
is set to its zero or full-scale value,
0x2FFFF
0x0FFFF
8, illustrate how the gain and off-
GAIN
Output State Upon Reset
Numerical Examples
0.75
0.25
G
REF
OFFSET
0x08000
0x38000
- 1 LSB.
Reset
V
OFFSET
-0.512
0.512
(V)
Note that during reset, when RST is low or RSTSW is set
to 0, the output voltage is set slightly lower than the value
after coming out of reset. During reset, the output voltage
is set to the values shown for the V
tion in the Electrical Characteristics.
The device can be powered down by either hardware
(pulling PD high) or software (setting the PD_SW bit in
either the 0x4 or 0xC registers). Note that the hardware
and software inputs are ORed. Asserting either is enough
to place the device in power-down mode.
In order to restore normal operation to the device, satisfy
both of these conditions:
1) Pull PD low.
2) Set the bits PD_SW’s (in both 0x4 and 0xC registers)
In power-down, the output is internally connected to
AGND through a 2kI resistor. The SPI interface remains
active and the DAC register content remains unchanged.
The MAX5318 interprets the data code input (DIN) as
either straight binary or two’s complement. To choose the
straight binary format, set the TC/SB input low. For two’s
complement, set the input high.
V
+ 0.75 x (-1.024)
+ 0.512 = 1.792V
V
+ 0.25 x 1.024
- 0.512 = 1.792V
CALCULATION
to 0.
OUT
OUT
(Straight Binary vs. Two’s Complement)
= 4.096/2
= 4.096/2
• For V
• For V
• For G, use Table 2
• For V
• For V
• For V
• For G, use Table 2
• For V
formula
formula
DIN
DIN
OUT
OFFSET
OUT
OFFSET
Data Format Selection
, use Table 1b first formula
, use Table 1b first formula
, use Equation 4
, use Equation 4
COMMENT
, use Table 3 second
, use Table 3 first
MAX5318
OUT-RESET
Power-Down
specifica-
27