MAX5887EGK MAXIM [Maxim Integrated Products], MAX5887EGK Datasheet - Page 15

• Manufacturer Part Number: MAX5887EGK
• Description: 3.3V, 14-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
• Manufacturer: MAXIM [Maxim Integrated Products]

Figure 11. GSM/EDGE Tx Mask Requirements
quency applications should be closely followed. This
reduces EMI and internal crosstalk that can significant-
ly affect the dynamic performance of the MAX5887.
Use of a multilayer printed circuit (PC) board with sepa-
rate ground and power-supply planes is recommend-
ed. High-speed signals should run on lines directly
above the ground plane. Since the MAX5887 has sepa-
rate analog and digital ground buses (AGND,
CLKGND, and DGND, respectively), the PC board
should also have separate analog and digital ground
sections with only one point connecting the two planes.
Digital signals should be run above the digital ground
plane and analog/clock signals above the analog/clock
ground plane. Digital signals should be kept as far
away from sensitive analog inputs, reference inputs
sense lines, common-mode input, and clock inputs as
practical. A symmetric design of clock input and ana-
log output lines is recommended to minimize 2nd-order
harmonic distortion components and optimize the
DAC’s dynamic performance. Digital signal paths
should be kept short and run lengths matched to avoid
propagation delay and data skew mismatches.
Performance DAC with Differential LVDS Inputs
-30
-60
-70
-73
-75
-80
-90
O
0.2 0.4 0.6
FREQUENCY OFFSET FROM CARRIER (MHz)
______________________________________________________________________________________
MEASUREMENT BANDWIDTH
1.2
30kHz 100kHz
1.8
3.3V, 14-Bit, 500Msps High Dynamic
6.0
IMD REQUIREMENT: < -70dBc
INBAND
OUTBAND
WORST-CASE
NOISE LEVEL
The MAX5887 supports three separate power-supply
inputs for analog (AV
(VCLK) circuitry. Each AV
should at least be decoupled with a separate 0.1µF
capacitor as close to the pin as possible and their
opposite ends with the shortest possible connection to
the corresponding ground plane (Figure 13). Try to
minimize the analog and digital load capacitances for
optimized operation. All three power-supply voltages
should also be decoupled at the point they enter the
PC board with tantalum or electrolytic capacitors.
Ferrite beads with additional decoupling capacitors
forming a pi network could also improve performance.
The analog and digital power-supply inputs AV
VCLK, and DV
age range of 3.3V ±5%.
The MAX5887 is packaged in a 68-pin QFN-EP
package (package code: G6800-4), providing greater
design flexibility, increased thermal efficiency**, and
optimized AC performance of the DAC. The EP enables
the user to implement grounding techniques, which are
necessary to ensure highest performance operation.
The EP must be soldered down to AGND.
Figure 12. Four-Tone MTPR Test Results
**Thermal efficiency is not the key factor, since the MAX5887
features low-power operation. The exposed pad is the key ele-
ment to ensure a solid ground connection between the DAC
and the PC board’s analog ground layer.
-100
-110
-10
-20
-30
-40
-50
-60
-70
-80
-90
0
FOUR-TONE MULTITONE POWER RATIO PLOT
26
(f
f
f
f
f
T1
T2
T3
T4
CLK
DD
A
BW = 12MHz
OUT
= 30.0659MHz
= 31.0181MHz
= 33.0688MHz
= 34.0209MHz
= 300MHz, f
28
= -12dB FS
of the MAX5887 allow a supply volt-
f
T1
30
DD
f
), digital (DV
OUT
f
T2
DD
CENTER
32
(MHz)
f
T3
, DV
= 31.9702MHz)
34
f
DD
T4
, and VCLK input
36
DD
), and clock
38
DD
15
,