TDA9550 PHILIPS [NXP Semiconductors], TDA9550 Datasheet - Page 20
TDA9550
Manufacturer Part Number
TDA9550
Description
TV signal processor-Teletext decoder with embedded m-Controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.TDA9550.pdf
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Philips Semiconductors
Table 3 SFR Bit description
2000 Jun 22
PWM0
PWM1
PWM2
PWM3
ROMBK
S1ADR
S1CON
TV signal processor-Teletext decoder with
embedded -Controller
IIC_LUT<1:0>
ROMBK<1:0>
Names
PW0V<5:0>
PW1V<5:0>
PW2V<5:0>
PW3V<5:0>
STANDBY
ADR<6:0>
CR<2:0>
PW0E
PW1E
PW2E
PW3E
ENSI
GC
P
Parity bit.
0 - Disable Pulse Width Modulator 0.
1 - Enable Pulse Width Modulator 0.
Pulse Width Modulator high time.
0 - Disable Pulse Width Modulator 1.
1 - Enable Pulse Width Modulator 1.
Pulse Width Modulator high time.
0 - Disable Pulse Width Modulator 2.
1 - Enable Pulse Width Modulator 2.
Pulse Width Modulator high time.
0 - Disable Pulse Width Modulator 3.
1 - Enable Pulse Width Modulator 3.
Pulse Width Modulator high time.
0 - Disable Stand-by Mode
1 - Enable Stand-by Mode
IIC Lookup table selection:
IIC_LUT<1:0>=00, 558 Normal Mode.
IIC_LUT<1:0>=01, 558 Fast Mode.
IIC_LUT<1:0>=10, 558 Slow Mode.
IIC_LUT<1:0>=11, Reserved.
ROM Bank selection
ROMBK<1:0>=00, Bank0
ROMBK<1:0>=01, Bank1
ROMBK<1:0>=10, Bank2
ROMBK<1:0>=11, Reserved
I2C Slave Address.
0 - Disable I
1 - Enable I
Clock rate bits.
IIC rates are selectable (three tables)
0 - Disable I
1 - Enable I
STANDBY
ADR<6>
CR<2>
PW0E
PW1E
PW2E
PW3E
BIT7
2
2
2
2
C general call address.
C interface.
C general call address.
C interface.
IIC_LUT<1>
ADR<5>
BIT6
ENSI
1
1
1
1
IIC_LUT<0>
PW0V<5>
PW1V<5>
PW2V<5>
PW3V<5>
ADR<4>
BIT5
STA
PW0V<4>
PW1V<4>
PW2V<4>
PW3V<4>
ADR<3>
BIT4
STO
0
20
PW0V<3>
PW1V<3>
PW2V<3>
PW3V<3>
ADR<2>
BIT3
SI
0
TDA955X/6X/8X PS/N1 series
PW0V<2>
PW1V<2>
PW2V<2>
PW3V<2>
ADR<1>
BIT2
AA
0
PW0V<1>
PW1V<1>
PW2V<1>
PW3V<1>
ROMBK<1>
ADR<0>
CR<1>
BIT1
Tentative Device Specification
PW0V<0>
PW1V<0>
PW2V<0>
PW3V<0>
ROMBK<0>
CR<0>
BIT0
GC
RESET
40H
40H
40H
40H
00H
00H
00H
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