MK60N256VLL100 FREESCALE [Freescale Semiconductor, Inc], MK60N256VLL100 Datasheet - Page 62

• Manufacturer Part Number: MK60N256VLL100
• Description: Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Peripheral operating requirements and behaviors
6.8.11 I
This section provides the AC timings for the I
modes (clocks input). All timings are given for non-inverted serial clock polarity
(TCR[TSCKP] = 0, RCR[RSCKP] = 0) and a non-inverted frame sync (TCR[TFSI] = 0,
RCR[RFSI] = 0). If the polarity of the clock and/or the frame sync have been inverted, all
the timings remain valid by inverting the clock signal (I2S_BCLK) and/or the frame sync
(I2S_FS) shown in the figures below.
62
Num
SD5
SD6
SD7
SD8
Num
S1
SDHC_CLK
Output SDHC_CMD
Output SDHC_DAT[3:0]
Input SDHC_CMD
Input SDHC_DAT[3:0]
2
S switching specifications
Operating voltage
I2S_MCLK cycle time
Description
Symbol
t
t
t
t
THL
THL
THL
OD
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
Table 43. SDHC switching specifications
Clock fall time
SDHC output delay (output valid)
SDHC input setup time
SDHC input hold time
Description
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Table 44. I
SD3
SD6
(continued)
Table continues on the next page...
Figure 28. SDHC timing
SD2
SD7
2
S master mode timing
Preliminary
2
SD8
S in master (clocks driven) and slave
SD1
2 x t
Min.
2.7
SYS
Min.
—
-5
5
0
Freescale Semiconductor, Inc.
Max.
3.6
Max.
6.5
—
—
3
Unit
ns
Unit
V
ns
ns
ns
ns