PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 224
PIC18C242
Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C242.pdf
(296 pages)
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PIC18CXX2
RLNCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS39026B-page 224
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register ’f’
[ label ] RLNCF
0
d
a
(f<n>)
(f<7>)
The contents of register ’f’ are
rotated one bit to the left. If ’d’ is 0
the result is placed in WREG. If ’d’
is 1, the result is stored back in reg-
ister 'f' (default). If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1,
then the bank will be selected as
per the BSR value (default).
1
1
RLNCF
Rotate Left f (no carry)
N,Z
Read
Q2
0100
1010 1011
0101 0111
f
[0,1]
[0,1]
255
dest<n+1>,
dest<0>
01da
Process
REG, 1, 0
Data
Q3
register f
f,d,a
ffff
destination
Write to
Q4
ffff
Preliminary
RRCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
REG
C
REG
WREG
C
Q1
=
=
=
=
=
register ’f’
Rotate Right f through Carry
[ label ]
0
d
a
(f<n>)
(f<0>)
(C)
C,N,Z
The contents of register 'f' are
rotated one bit to the right through
the Carry Flag. If 'd' is 0, the result
is placed in WREG. If 'd' is 1, the
result is placed back in register 'f'
(default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, then the
bank will be selected as per the
BSR value (default).
1
1
RRCF
Read
0011
Q2
1110 0110
0
1110 0110
0111 0011
0
f
[0,1]
[0,1]
C
dest<7>
255
7/99 Microchip Technology Inc.
dest<n-1>,
C,
RRCF f,d,a
00da
Process
REG, 0, 0
Data
register f
Q3
ffff
destination
Write to
Q4
ffff
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