PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 36
PIC18C242
Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C242.pdf
(296 pages)
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PIC18CXX2
Register 4-1:
FIGURE 4-3:
4.2.3
Since the Top-of-Stack (TOS) is readable and writable,
the ability to push values onto the stack and pull values
off the stack without disturbing normal program execu-
tion is a desirable option. To push the current PC value
onto the stack, a PUSH instruction can be executed.
This will increment the stack pointer and load the cur-
rent PC value onto the stack. TOSU, TOSH and TOSL
can then be modified to place a return address on the
stack.
The ability to pull the TOS value off of the stack and
replace it with the value that was previously pushed
onto the stack, without disturbing normal execution, is
achieved by using the POP instruction. The POP instruc-
tion discards the current TOS by decrementing the
stack pointer. The previous value pushed onto the
stack then becomes the TOS value.
DS39026B-page 36
bit7
bit 7
bit 6
bit 5:
bit 4-0: SP4:SP0: Stack Pointer Location bits
STKFUL STKUNF
Note 1: Bit 7 and Bit 6 can only be cleared in user software or by a POR.
R/C-0
(1)
(1)
PUSH AND POP INSTRUCTIONS
: STKFUL: Stack Full Flag bit
: STKUNF: Stack Underflow Flag bit
1 = Stack became full or overflowed
0 = Stack has not become full or overflowed
1 = Stack underflow occurred
0 = Stack underflow did not occur
Unimplemented: Read as ’0’
R/C-0
6
STKPTR - Stack Pointer Register
RETURN ADDRESS STACK AND ASSOCIATED REGISTERS
TOSU
0x00
U-0
5
-
R/W-0
SP4
4
TOSH
0x1A
R/W-0
SP3
3
Top of Stack
TOSL
0x34
Preliminary
R/W-0
SP2
2
Return Address Stack
0x001A34
0x000D58
4.2.4
These resets are enabled by programming the
STVREN configuration bit. When the STVREN bit is
disabled, a full or underflow condition will set the appro-
priate STKFUL or STKUNF bit, but not cause a device
reset. When the STVREN bit is enabled, a full or under-
flow will set the appropriate STKFUL or STKUNF bit
and then cause a device reset. The STKFUL or
STKUNF bits are only cleared by the user software or
a POR reset.
R/W-0
SP1
1
STACK FULL/UNDERFLOW RESETS
R/W-0
11111
11110
11101
00011
00010
00001
00000
SP0
bit0
STKPTR<4:0>
R = Readable bit
W = Writeable bit
C = Clearable bit
U = Unimplemented bit,
- n = Value at POR reset
00010
7/99 Microchip Technology Inc.
Read as ‘0’
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