PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 98
PIC18C242
Manufacturer Part Number
PIC18C242
Description
High-Performance Microcontrollers with 10-Bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18C242.pdf
(296 pages)
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PIC18CXX2
10.1
Timer1 can operate in one of these modes:
• As a timer
• As a synchronous counter
• As an asynchronous counter
The operating mode is determined by the clock select
bit, TMR1CS (T1CON<1>).
FIGURE 10-1: TIMER1 BLOCK DIAGRAM
FIGURE 10-2: TIMER1 BLOCK DIAGRAM: 16-BIT READ/WRITE MODE
DS39026B-page 98
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This eliminates
T13CKI/T1OSO
T1CKI/T1OSO
T1OSI
TMR1IF
Overflow
Interrupt
flag bit
Note 1: When enable bit T1OSCEN is cleared, the inverter and feedback resistor are turned off. This
Timer1 Operation
Data bus<7:0>
TMR1IF
Overflow
Interrupt
Flag Bit
Write TMR1L
Read TMR1L
power drain.
T1OSI
eliminates power drain.
8
T1OSC
high byte
TMR1H
Timer 1
8
TMR1H
T1OSC
8
TMR1
TMR1
Oscillator
Enable
T1OSCEN
T1OSCEN
Enable
Oscillator
TMR1L
TMR1L
8
(1)
CLR
(1)
Preliminary
Clock
Internal
F
OSC
Clock
Internal
Fosc/4
TMR1ON
/4
CCP Special Event Trigger
on/off
TMR1ON
TMR1CS
on/off
1
0
When TMR1CS = 0, Timer1 increments every instruc-
tion cycle. When TMR1CS = 1, Timer1 increments on
every rising edge of the external clock input or the
Timer1 oscillator, if enabled.
When the Timer1 oscillator is enabled (T1OSCEN is
set), the RC1/T1OSI and RC0/T1OSO/T1CKI pins
become inputs. That is, the TRISC<1:0> value is
ignored.
Timer1 also has an internal “reset input”. This reset can
be generated by the CCP module (Section 13.0).
TMR1CS
1
0
T1CKPS1:T1CKPS0
T1SYNC
Prescaler
1, 2, 4, 8
T1CKPS1:T1CKPS0
T1SYNC
Prescaler
1, 2, 4, 8
0
1
2
0
1
2
Synchronized
Clock Input
7/99 Microchip Technology Inc.
Synchronize
SLEEP input
Synchronized
clock input
Synchronize
SLEEP input
det
det
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