MC68HC705JD FREESCALE [Freescale Semiconductor, Inc], MC68HC705JD Datasheet - Page 20

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MC68HC705JD

Manufacturer Part Number
MC68HC705JD
Description
member of the low-cost
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
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20
1
2
3
4
5
6
7
8
9
3-2
NOTE: R/W is an internal MCU signal.
R/W
0
0
1
1
[1] Output buffer enables latched output to drive I/O pin when DDR bit is 1 (output mode).
[2] Input buffer enabled when DDR bit is 0 (input mode).
[3] Input buffer enabled when DDR bit is 1 (output mode).
DDR Bit
Freescale Semiconductor, Inc.
0
1
0
1
For More Information On This Product,
Figure 3-1. Parallel I/O Port Circuit
DATA DIRECTION
OUTPUT DATA
REGISTER
LATCHED
Table 3-1. I/O Pin Functions
The I/O pin is an input. Data is written into the output data latch.
Data is written into the output data latch, which drives the I/O pin.
The state of the I/O pin is read.
The I/O pin is an output. The output data latch is read.
BIT
BIT
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PARALLEL I/O
[3]
I/O Pin Function
[2]
[1]
PIN
I/O
Rev. 2

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