PIC18F2450 MICROCHIP [Microchip Technology], PIC18F2450 Datasheet - Page 203

• Manufacturer Part Number: PIC18F2450
• Description: 28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

18.2
For PIC18F2450/4450 devices, the WDT is driven by
the INTRC source. When the WDT is enabled, the
clock source is also enabled. The nominal WDT period
is 4 ms and has the same stability as the INTRC
oscillator.
The 4 ms period of the WDT is multiplied by a 16-bit
postscaler. Any output of the WDT postscaler is
selected by a multiplexer, controlled by bits in
Configuration Register 2H. Available periods range
from 4 ms to 131.072 seconds (2.18 minutes). The
WDT and postscaler are cleared when any of the
following events occur: a SLEEP or CLRWDT instruction
is executed or a clock failure has occurred.
.
FIGURE 18-1:
© 2006 Microchip Technology Inc.
All Device Resets
Watchdog Timer (WDT)
INTRC Source
WDTPS<3:0>
SWDTEN
WDTEN
CLRWDT
SLEEP
WDT BLOCK DIAGRAM
Enable WDT
WDT Counter
128
Advance Information
4
INTRC Control
Programmable Postscaler
1:1 to 1:32,768
18.2.1
Register 18-15 shows the WDTCON register. This is a
readable and writable register which contains a control
bit that allows software to override the WDT enable
Configuration bit, but only if the Configuration bit has
disabled the WDT.
Note 1: The CLRWDT and SLEEP instructions
2: When a CLRWDT instruction is executed,
WDT
PIC18F2450/4450
CONTROL REGISTER
clear the WDT and postscaler counts
when executed.
the postscaler count will be cleared.
Reset
Wake-up from
Power-Managed
Modes
WDT
Reset
DS39760A-page 201