AT83C24B-TIRIL ATMEL [ATMEL Corporation], AT83C24B-TIRIL Datasheet - Page 18
AT83C24B-TIRIL
Manufacturer Part Number
AT83C24B-TIRIL
Description
Smart Card Reader Interface with Power Management
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C24B-TIRIL.pdf
(42 pages)
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Deactivation Sequence
18
AT83C24
The card automatic deactivation is triggered when one the following condition occurs:
•
•
•
•
•
•
•
It is a self-timed sequence which cannot be interrupted when started (see Figure 14). Each step
is separated by a delay based on Td equal to 8 periods of the DC/DC clock, typically 2 µs:
Notes:
Figure 14. Deactivation Sequence
ICARDERR bit is set by hardware
VCARDERR bit is set by hardware (or by software)
INSERT is set and CARDIN is cleared (card extraction)
SHUTDOWN is set by software
CMDVCC goes from Low to High
Power fail on VCC (see POWERMON bit in CONFIG4 register)
Reset pin going low
1. T0: CARDRST is cleared, SHUTDOWN bit set.
2. T0 + 5 x Td:CARDCK is cleared, CKSTOP, CARDIO and IODIS are set.
3. T0 + 6 x Td: CARDIO is cleared.
4. T0 + 7 x Td: VCARD[1-0] = 00.
1. Setting ICARDERR by software does not trigger a deactivation. VCARDERR can be used to
2. t1=5 to 5.5*Td, and t2=0.5*Td to Td.
deactivate the card by software.
CRST
CCLK
CVCC
CIO,
CC4,
CC8
t1
t2
Td
4234G–SCR–01/07
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