PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 144

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PIC18F24J11

Manufacturer Part Number
PIC18F24J11
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18F46J11 FAMILY
TABLE 10-7:
TABLE 10-8:
DS39932D-page 144
RC5/SDO1/
RP16
RC6/PMA5/
TX1/CK1/RP17
RC7/PMA4/
RX1/DT1/RP18
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note 1:
PORTC
LATC
TRISC
Name
Pin
input/output; I
is overridden for this option)
This bit is only available on 44-pin devices.
TRISC7
LATC7
PORTC I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Bit 7
RC7
Function
PMA5
PMA4
SDO1
RP16
RP17
RP18
RC5
RC6
CK1
RC7
RX1
TX1
DT1
2
(1)
(1)
C/SMB = I
TRISC6
LATC6
Bit 6
RC6
Setting
TRIS
1
0
0
1
0
1
0
0
0
1
0
1
0
1
0
0
1
1
0
1
0
2
C/SMBus input buffer; x = Don’t care (TRIS bit does not affect port direction or
TRISC5
LATC5
Bit 5
RC5
I/O
O
O
O
O
O
O
O
O
O
O
O
O
1
I
I
I
I
I
I
I
I
Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
TRISC4
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
LATC4
Bit 4
RC4
PORTC<5> data input.
LATC<5> data output.
SPI data output (MSSP1 module).
Remappable peripheral pin 16 input.
Remappable peripheral pin 16 output.
PORTC<6> data input.
LATC<6> data output.
Parallel Master Port address.
Asynchronous serial transmit data output (EUSART
module); takes priority over port data. User must configure
as output.
Synchronous serial clock input (EUSART module).
Synchronous serial clock output (EUSART module); takes
priority over port data.
Remappable peripheral pin 17 input.
Remappable peripheral pin 17 output.
PORTC<7> data input.
LATC<7> data output.
Parallel Master Port address.
Asynchronous serial receive data input (EUSART module).
Synchronous serial data input (EUSART module). User
must configure as an input.
Synchronous serial data output (EUSART module); takes
priority over port data.
Remappable peripheral pin 18 input.
Remappable peripheral pin 18 output.
TRISC3
LATC3
Bit 3
RC3
TRISC2
LATC2
Bit 2
RC2
Description
TRISC1
LATC1
Bit 1
RC1
 2011 Microchip Technology Inc.
TRISC0
LATC0
Bit 0
RC0
on page:
Values
Reset
87
87
87

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