PIC18F24J11 MICROCHIP [Microchip Technology], PIC18F24J11 Datasheet - Page 195
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PIC18F24J11
Manufacturer Part Number
PIC18F24J11
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F24J11.pdf
(536 pages)
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TABLE 11-2:
2011 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
PMCONH
PMCONL
PMADDRH
PMDOUT1H
PMADDRL
PMDOUT1L
PMDOUT2H
PMDOUT2L
PMDIN1H
PMDIN1L
PMDIN2H
PMDIN2L
PMMODEH
PMMODEL
PMEH
PMEL
PMSTATH
PMSTATL
PADCFG1
Legend:
Note 1:
Name
(2)
(2)
2:
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1,2)
(1,2)
(2)
(2)
— = unimplemented, read as ‘0’. Shaded cells are not used during PMP operation.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the physical registers and
addresses, but have different functions determined by the module’s operating mode.
These bits and/or registers are only available in 44-pin devices.
(1,2)
(2)
(1,2)
(2)
/
/
Parallel Port Out Data High Byte (Buffer 1)
Parallel Master Port Address Low Byte
Parallel Port Out Data Low Byte (Buffer 0)
Parallel Port Out Data High Byte (Buffer 3)
Parallel Port Out Data Low Byte (Buffer 2)
Parallel Port In Data High Byte (Buffer 1)
Parallel Port In Data Low Byte (Buffer 0)
Parallel Port In Data High Byte (Buffer 3)
Parallel Port In Data Low Byte (Buffer 2)
GIE/GIEH PEIE/GIEL TMR0IE
PMPIE
PMPIP
PMPIF
REGISTERS ASSOCIATED WITH PMP MODULE
WAITB1
PMPEN
PTEN7
BUSY
CSF1
Bit 7
OBE
IBF
—
—
—
(2)
(2)
(2)
WAITB0
PTEN14
IRQM1
PTEN6
OBUF
CSF0
ADIF
ADIE
ADIP
IBOV
Bit 6
CS1
—
—
Parallel Master Port Address High Byte
WAITM3
IRQM0
PTEN5
RC1IF
RC1IE
RC1IP
Bit 5
ALP
—
—
—
—
—
ADRMUX1 ADRMUX0
WAITM2
PTEN4
INT0IE
INCM1
TX1IF
TX1IE
TX1IP
Bit 4
—
—
—
—
—
WAITM1
PIC18F46J11 FAMILY
SSP1IF
SSP1IE
SSP1IP
INCM0
PTEN3
CS1P
OB3E
RBIE
Bit 3
IB3F
—
—
RTSECSEL1 RTSECSEL0 PMPTTL
MODE16
PTBEEN
WAITM0
TMR0IF
CCP1IF
CCP1IE
CCP1IP
PTEN2
OB2E
Bit 2
IB2F
BEP
—
PTWREN
TMR2IE
TMR2IP
WAITE1
TMR2IF
MODE1
PTEN1
INT0IF
WRSP
OB1E
Bit 1
IB1F
—
PTRDEN
DS39932D-page 195
TMR1IE
TMR1IP
WAITE0
TMR1IF
MODE0
PTEN0
RDSP
OB0E
RBIF
Bit 0
IB0F
—
on Page:
Values
Reset
69
72
72
72
73
73
73
73
73
73
73
73
73
73
73
73
73
73
74
74
74
74
74
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