MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 107
MC68HC705V12CFN
Manufacturer Part Number
MC68HC705V12CFN
Description
The Motorola microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705V12CFN.pdf
(248 pages)
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10.6 SPI Registers
10.6.1 Serial Peripheral Control Register
MC68HC705V12
MOTOROLA
—
Rev. 3.0
Address:
The three registers in the SPI, described here, provide control, status,
and data storage functions. These registers are:
SPIE — Serial Peripheral Interrupt Enable Bit
SPE — Serial Peripheral System Enable Bit
MSTR — Master Mode Select Bit
Reset:
Read:
Write:
•
•
•
1 = SPI interrupt if SPIF = 1
0 = SPIF interrupts disabled
1 = SPI system on; port B becomes SPI pins
0 = SPI system off
1 = Master mode
0 = Slave mode
Serial peripheral control register (SPCR)
Serial peripheral status register (SPSR)
Serial peripheral data I/O register (SPDR)
$000A
SPIE
Bit 7
0
Serial Peripheral Interface (SPI)
Figure 10-4. SPI Control Register (SPCR)
= Unimplemented
SPE
6
0
5
0
0
MSTR
4
0
U = Unaffected
CPOL
3
0
Serial Peripheral Interface (SPI)
CPHA
2
1
Advance Information
SPR1
U
1
SPI Registers
SPR0
Bit 0
U
107
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