MC68HC705V12CFN MOTOROLA [Motorola, Inc], MC68HC705V12CFN Datasheet - Page 117

• Manufacturer Part Number: MC68HC705V12CFN
• Description: The Motorola microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

11.4.1 PWMA Control Register
MC68HC705V12
MOTOROLA
NOTE:
—
Rev. 3.0
Address:
PSA1A, PSA0A, PSB3A PSB0A — PWMA Clock Rate Bits
Any non-zero value of PSA1A PSA0A forces PB4 to the PWMA output
state. If PSA1A:PSA0A = 00, PB4 is determined by the port B data and
data direction registers as described in
Input/Output
Reset:
Read:
Write:
PSA1A–
PSA0A
These bits select the input clock rate and determine the period as
shown in
obtained with more than one combination of PSA and PSB values.
For instance, a PWMA output of f
PSA PSA0 = 10 and PSB3 PSB0 = $0 or PSA1 PSA0 = 01 and
PSB3 PSB0 = $07. The frequency division provided by the PSB
values will be one more that the value written to the register. For
example, a $0 written to the PSB bits provides a 1 and a $1 provides
a 2 etc.
This scheme allows for 38 unique frequency selections.
00
01
10
11
PSA1A
$0037
Bit 7
0
Figure 11-5. PWMA Control Register (PWMAC)
Pulse Width Modulators (PWMs)
Table
0000–1111
0000–1111
0000–1111
PSB3A–
(I/O).
PSB0A
= Unimplemented
xxxx
PSA0A
6
0
11-1. Note that some output frequencies can be
Table 11-1. PWMA Clock Rates
5
0
0
RCLKA
f
f
f
OP
OP
OP
Off
/16
/1
/8
4
0
0
f
OP
f
OP
f
OP
OP
/16 – f
/512 can be obtained with either
/8 – f
SCLKA
/1 – f
Section 7. Parallel
PSB3A
Off
3
0
OP
OP
OP
Pulse Width Modulators (PWMs)
/128
/16
/256
PSB2A
2
0
f
OP
f
f
OP
Advance Information
OP
/1024 – f
PWMA OUT
/512 – f
/64 – f
PSB1A
PWM Registers
1
0
Off
OP
OP
OP
/1024
/8192
/16384
PSB0A
Bit 0
0
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