PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 250

• Manufacturer Part Number: PIC18F25J50
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F46J50 FAMILY
18.4
In Pulse-Width Modulation (PWM) mode, the CCPx pin
produces up to a 10-bit resolution PWM output.
Figure 18-3
CCP module in PWM mode.
For a step-by-step procedure on how to set up a CCP
module for PWM operation, see
“Setup for PWM
FIGURE 18-3:
A PWM output
and a time that the output stays high (duty cycle).
The frequency of the PWM is the inverse of the
period (1/period).
FIGURE 18-4:
DS39931D-page 250
Note 1:
Latch
Duty Cycle
TMRx = PRx
Set CCPx Pin
Reset
Match
TMR2 (TMR4) = PR2 (TMR4)
PWM Mode
The two LSbs of the Duty Cycle register are held by a
2-bit latch that is part of the module’s hardware. It is
physically separate from the CCPRx registers.
Duty Cycle Register
Duty Cycle
shows a simplified block diagram of the
9
Comparator
CCPRxL
CCPRxH
Comparator
(Figure
TMRx
PRx
Period
Operation”.
TMR2 (TMR4) = Duty Cycle
SIMPLIFIED PWM BLOCK
DIAGRAM
PWM OUTPUT
18-4) has a time base (period)
(1)
0
TMR2 (TMR4) = PR2 (PR4)
CCPxCON<5:4>
2 LSbs Latched
from Q Clocks
S
R
Q
Output Enable
Section 18.4.3
TRIS
CCPx
Pin
18.4.1
The PWM period is specified by writing to the PR2
(PR4) register. The PWM period can be calculated
using
EQUATION 18-1:
PWM frequency is defined as 1/[PWM period].
When TMR2 (TMR4) is equal to PR2 (PR4), the
following three events occur on the next increment
cycle:
• TMR2 (TMR4) is cleared
• The CCPx pin is set (exception: if PWM Duty
• The PWM duty cycle is latched from CCPRxL into
18.4.2
The PWM duty cycle is specified by writing to the
CCPRxL register and to the CCPxCON<5:4> bits. Up
to 10-bit resolution is available. The CCPRxL contains
the eight MSbs and the CCPxCON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPRxL:CCPxCON<5:4>.
calculate the PWM duty cycle in time.
EQUATION 18-2:
CCPRxL and CCPxCON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPRxH until after a match between PR2 (PR4) and
TMR2 (TMR4) occurs (i.e., the period is complete). In
PWM mode, CCPRxH is a read-only register.
Cycle = 0%, the CCPx pin will not be set)
CCPRxH
Note:
PWM Duty Cycle = (CCPR
Equation
PWM Period = [(PR2) + 1] • 4 • T
PWM PERIOD
The Timer2 and Timer 4 postscalers (see
Section 15.0 “Timer3 Module”
Section 16.0 “Timer4
used in the determination of the PWM
frequency. The postscaler could be used
to have a servo update rate at a different
frequency than the PWM output.
PWM DUTY CYCLE
18-1:
T
OSC
(TMR2 Prescale Value)
 2011 Microchip Technology Inc.
• (TMR2 Prescale Value)
Equation 18-2
X
L:CCP
Module”) are not
X
CON<5:4>) •
OSC
is used to
•
and