PIC18F25K80 MICROCHIP [Microchip Technology], PIC18F25K80 Datasheet - Page 437
PIC18F25K80
Manufacturer Part Number
PIC18F25K80
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25K80.pdf
(628 pages)
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27.2.5
This register controls the operation of the CAN module’s
I/O pins in relation to the rest of the microcontroller.
REGISTER 27-55: CIOCON: CAN I/O CONTROL REGISTER
2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3-1
bit 0
Note 1:
TX2SRC
R/W-0
Always set this bit when using a differential bus to avoid signal crosstalk in CANTX from other nearby pins.
CAN MODULE I/O CONTROL
REGISTER
TX2SRC: CANTX2 Pin Data Source bit
1 = CANTX2 pin will output the CAN clock
0 = CANTX2 pin will output CANTX
TX2EN: CANTX Pin Enable bit
1 = CANTX2 pin will output CANTX or CAN clock as selected by the TX2SRC bit
0 = CANTX2 pin will have digital I/O function
ENDRHI: Enable Drive High bit
1 = CANTX pin will drive V
0 = CANTX pin will be tri-state when recessive
CANCAP: CAN Message Receive Capture Enable bit
1 = Enable CAN capture; CAN message receive signal replaces input on RC2/CCP1
0 = Disable CAN capture; RC2/CCP1 input to CCP1 module
Unimplemented: Read as ‘ 0 ’
CLKSEL: CAN Clock Source Selection bit
1 = Use the oscillator as the source of the CAN system clock
0 = Use the PLL as the source of the CAN system clock
TX2EN
R/W-0
W = Writable bit
‘1’ = Bit is set
ENDRHI
R/W-0
(1)
DD
when recessive
CANCAP
(1)
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F66K80 FAMILY
U-0
—
U-0
—
x = Bit is unknown
U-0
—
DS39977C-page 437
CLKSEL
R/W-0
bit 0
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