MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 186

• Manufacturer Part Number: MC68HC908JK3EMP
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Low Voltage Inhibit (LVI)
16.4 Functional Description
16.5 LVI Control Register (CONFIG2/CONFIG1)
Technical Data
186
Address:
Figure 16-1
after a reset. The LVI module contains a bandgap reference circuit and
comparator. Setting LVI disable bit (LVID) disables the LVI to monitor
V
at which V
The LVI module generates one output signal:
LVI Reset — an reset signal will be generated to reset the CPU when
V
Reset:
Read:
DD
DD
Write:
POR:
LVIT1
DETECTOR
voltage. The LVI trip voltage selection bits (LVIT1, LVIT0) determine
drops to below the set trip point.
LOW V
IRQPUD
V
$001E
DD
Bit 7
Figure 16-2. Configuration Register 2 (CONFIG2)
R
0
0
DD
DD
LVIT0
shows the structure of the LVI module. The LVI is enabled
Low Voltage Inhibit (LVI)
level the LVI module should take actions.
Figure 16-1. LVI Module Block Diagram
= Reserved
V
V
DD
DD
R
6
0
0
> LVI
< LVI
TRIP
TRIP
= 0
= 1
R
5
0
0
Not affected Not affected
LVIT1
4
0
MC68H(R)C908JL3E/JK3E/JK1E
LVIT0
3
0
LVID
R
2
0
0
R
1
0
0
MOTOROLA
—
LVI RESET
Rev. 2.0
Bit 0
R
0
0