MC68HC908JL8 MOTOROLA [Motorola, Inc], MC68HC908JL8 Datasheet - Page 89

• Manufacturer Part Number: MC68HC908JL8
• Description: Motorola reserves the right to make changes without further notice to any products herein
• Manufacturer: MOTOROLA [Motorola, Inc]

7.3 SIM Bus Clock Control and Generation
7.3.1 Bus Timing
7.3.2 Clock Start-Up from POR or LVI Reset
7.3.3 Clocks in Stop Mode and Wait Mode
MC68HC908JL8
MOTOROLA
—
Rev. 2.0
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, OSCOUT, as shown in
In user mode, the internal bus frequency is the oscillator frequency
divided by four.
When the power-on reset module or the low-voltage inhibit module
generates a reset, the clocks to the CPU and peripherals are inactive
and held in an inactive phase until after the 4096 ICLK cycle POR
timeout has completed. The RST pin is driven low by the SIM during this
entire period. The IBUS clocks start upon completion of the timeout.
Upon exit from stop mode by an interrupt, break, or reset, the SIM allows
ICLK to clock the SIM counter. The CPU and peripheral clocks do not
become active until after the stop delay time-out. This time-out is
selectable as 4096 or 32 ICLK cycles. (See
In wait mode, the CPU clocks are inactive. The SIM also produces two
sets of clocks for other modules. Refer to the wait mode subsection of
each module to see if the module is active or inactive in wait mode.
Some modules can be programmed to be active in wait mode.
Freescale Semiconductor, Inc.
For More Information On This Product,
System Integration Module (SIM)
OSCOUT is OSC frequency divided by 2
Go to: www.freescale.com
OSCILLATOR
OSCILLATOR
Figure 7-3. SIM Clock Signals
From
From
OSCOUT
ICLK
SIM Bus Clock Control and Generation
Figure
SIM COUNTER
÷
System Integration Module (SIM)
7.7.2 Stop
2
SIM
7-3.
GENERATORS
BUS CLOCK
Mode.)
Technical Data
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